제품 상세 정보

Technology family LVC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 85 Rating Catalog
Technology family LVC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 85 Rating Catalog
DSBGA (YZP) 8 2.8125 mm² 2.25 x 1.25 SSOP (DCT) 8 11.8 mm² 2.95 x 4 VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • Available in the Texas Instruments
    NanoFree™ package
  • Supports 5-V VCC operation
  • Inputs accept voltages to 5.5 V
  • Max tpd of 6 ns at 3.3 V
  • Low power consumption, 10-µA Maximum ICC
  • ±24-mA Output drive at 3.3 V
  • Typical VOLP (Output ground bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports live insertion, partial-power-down mode, and back-drive protection
  • Can be used as a down translator to translate inputs from a maximum of 5.5 V down
    to the VCC Level
  • Latch-up performance exceeds 100 mA per
    JESD 78, Class II
  • ESD Protection exceeds JESD 22
    • 2000-V Human body model (A114-A)
    • 1000-V Charged-device model (C101)
  • Available in the Texas Instruments
    NanoFree™ package
  • Supports 5-V VCC operation
  • Inputs accept voltages to 5.5 V
  • Max tpd of 6 ns at 3.3 V
  • Low power consumption, 10-µA Maximum ICC
  • ±24-mA Output drive at 3.3 V
  • Typical VOLP (Output ground bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports live insertion, partial-power-down mode, and back-drive protection
  • Can be used as a down translator to translate inputs from a maximum of 5.5 V down
    to the VCC Level
  • Latch-up performance exceeds 100 mA per
    JESD 78, Class II
  • ESD Protection exceeds JESD 22
    • 2000-V Human body model (A114-A)
    • 1000-V Charged-device model (C101)

This single 2-line to 1-line data selector multiplexer is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G157 device features a common strobe (G) input. When the strobe is high, Y is low and Y is high. When the strobe is low, a single bit is selected from one of two sources and is routed to the outputs. The device provides true and complementary data.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This single 2-line to 1-line data selector multiplexer is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G157 device features a common strobe (G) input. When the strobe is high, Y is low and Y is high. When the strobe is low, a single bit is selected from one of two sources and is routed to the outputs. The device provides true and complementary data.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
CD74AC157 활성 쿼드 2입력 비인버팅 멀티플렉서 Different voltage range (2V to 6V), longer average propagation delay (7ns)

기술 문서

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모두 보기27
유형 직함 날짜
* Data sheet SN74LVC2G157 Single 2-Line to 1-Line data selector multiplexer datasheet (Rev. N) PDF | HTML 2019/03/04
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Little Logic Guide 2018 (Rev. G) 2018/07/06
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note How to Select Little Logic (Rev. A) 2016/07/26
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Product overview Design Summary for WCSP Little Logic (Rev. B) 2004/11/04
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note Selecting the Right Level Translation Solution (Rev. A) 2004/06/22
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 2003/11/06
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 2002/12/18
Application note Texas Instruments Little Logic Application Report 2002/11/01
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
More literature Standard Linear & Logic for PCs, Servers & Motherboards 2002/06/13
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 2002/05/22
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 2002/05/10
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 2002/03/27
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 1997/12/01
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997/08/01
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note LVC Characterization Information 1996/12/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Design guide Low-Voltage Logic (LVC) Designer's Guide 1996/09/01
Application note Understanding Advanced Bus-Interface Products Design Guide 1996/05/01

설계 및 개발

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평가 보드

5-8-LOGIC-EVM — 5핀~8핀 DCK, DCT, DCU, DRL 및 DBV 패키지용 일반 논리 평가 모듈

5~8핀 수의 DCK, DCT, DCU, DRL 또는 DBV 패키지가 있는 모든 디바이스를 지원하도록 설계된 유연한 EVM.
사용 설명서: PDF
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시뮬레이션 모델

HSPICE MODEL OF SN74LVC2G157

SCEJ234.ZIP (91 KB) - HSpice Model
시뮬레이션 모델

SN74LVC2G157 IBIS Model (Rev. A)

SCEM298A.ZIP (44 KB) - IBIS Model
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Test report: PDF
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패키지 다운로드
DSBGA (YZP) 8 옵션 보기
SSOP (DCT) 8 옵션 보기
VSSOP (DCU) 8 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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