제품 상세 정보

Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 3.3 Protocols Analog, I2C, I3C, LVDS, UART Ron (typ) (Ω) 6 CON (typ) (pF) 7.5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 900 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 4.3 Supply voltage (max) (V) 4.3
Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 3.3 Protocols Analog, I2C, I3C, LVDS, UART Ron (typ) (Ω) 6 CON (typ) (pF) 7.5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 900 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 4.3 Supply voltage (max) (V) 4.3
UQFN (RSW) 10 2.52 mm² 1.8 x 1.4 VSSOP (DGS) 10 14.7 mm² 3 x 4.9
  • VCC Operation at 3 V to 4.3 V
  • I/O Pins Can Tolerate up to 5.25 V
  • 1.8-V Compatible Control Logic
  • Supports Powered-off Protection I/O Pins Hi-Z When VCC = 0 V
  • RON = 10 Ω Maximum
  • ΔRON = 0.35 Ω Typical
  • Cio(ON) = 7.5 pF Typical
  • Low Power Consumption (1 uA Maximum)
  • –3-dB Bandwidth = 900 MHz Typical
  • Latch-Up Performance Exceeds
    100 mA Per JESD 78, Class II (1)
  • ESD Performance Tested Per JESD 22
    • 8000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • ESD Performance I/O Port to GND (2)
    • 15000-V Human-Body Model

(1)Except EN and SEL Inputs

(2)High-voltage HBM is performed in addition to the standard HBM testing (A114-B, Class II) and applies to I/O ports tested with respect to GND only.

  • VCC Operation at 3 V to 4.3 V
  • I/O Pins Can Tolerate up to 5.25 V
  • 1.8-V Compatible Control Logic
  • Supports Powered-off Protection I/O Pins Hi-Z When VCC = 0 V
  • RON = 10 Ω Maximum
  • ΔRON = 0.35 Ω Typical
  • Cio(ON) = 7.5 pF Typical
  • Low Power Consumption (1 uA Maximum)
  • –3-dB Bandwidth = 900 MHz Typical
  • Latch-Up Performance Exceeds
    100 mA Per JESD 78, Class II (1)
  • ESD Performance Tested Per JESD 22
    • 8000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • ESD Performance I/O Port to GND (2)
    • 15000-V Human-Body Model

(1)Except EN and SEL Inputs

(2)High-voltage HBM is performed in addition to the standard HBM testing (A114-B, Class II) and applies to I/O ports tested with respect to GND only.

The TMUX154E is a high-bandwidth 2:1 switch specially designed for the switching of high-speed signals in applications with limited I/Os. The wide bandwidth (900 MHz) of this switch allows signals to pass with minimum edge and phase distortion. The switch is bidirectional and offers little or no attenuation of high-speed signals. It is designed for low bit-to-bit skew and high channel-to-channel noise isolation.

The TMUX154E integrates ESD protection cells on all pins, is available in a tiny UQFN package (1.8 mm × 1.4 mm) or a VSSOP package, and is characterized over the free-air temperature range of –40°C to 85°C.

The TMUX154E is a high-bandwidth 2:1 switch specially designed for the switching of high-speed signals in applications with limited I/Os. The wide bandwidth (900 MHz) of this switch allows signals to pass with minimum edge and phase distortion. The switch is bidirectional and offers little or no attenuation of high-speed signals. It is designed for low bit-to-bit skew and high channel-to-channel noise isolation.

The TMUX154E integrates ESD protection cells on all pins, is available in a tiny UQFN package (1.8 mm × 1.4 mm) or a VSSOP package, and is characterized over the free-air temperature range of –40°C to 85°C.

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기술 문서

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모두 보기9
유형 직함 날짜
* Data sheet TMUX154E ESD-Protected, Low Capacitance, 2-Channel, 2:1 Switch, With Powered-off Protection datasheet PDF | HTML 2018/02/06
Application brief Important Multiplexer Characteristics for I3C Applications PDF | HTML 2023/07/27
Application brief Best Practices: I2C Devices on an I3C Shared Bus PDF | HTML 2023/03/30
Application brief 1.8-V Logic for Multiplexers and Signal Switches (Rev. C) PDF | HTML 2022/07/26
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022/06/02
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021/12/01
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021/01/06
Technical article Roll with the design punches and overcome power-sequencing challenges PDF | HTML 2019/07/29
Application brief Improve Stability Issues with Low Con Multiplexers (Rev. A) 2018/12/10

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

인터페이스 어댑터

LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

사용 설명서: PDF
TI.com에서 구매할 수 없습니다
인터페이스 어댑터

LEADLESS-ADAPTER1 — TI의 6, 8, 10, 12, 14, 16 및 20핀 리드 없는 패키지의 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
사용 설명서: PDF
TI.com에서 구매할 수 없습니다
시뮬레이션 모델

TMUX154E TINA-TI Reference Design

SCDM178.TSC (409 KB) - TINA-TI Reference Design
시뮬레이션 모델

TMUX154E TINA-TI Spice Model

SCDM179.ZIP (5 KB) - TINA-TI Spice Model
패키지 다운로드
UQFN (RSW) 10 옵션 보기
VSSOP (DGS) 10 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

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