CDCLVP1204 Evaluation Module
CDCLVP1204EVM
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Description & Features

Technical Documents

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Description

The CDCLVP1204 is a high-performance, low additive phase noise clock buffer. It has two universal input buffers that support either single-ended or differential clock inputs, selectable through a control pin. The device also features on-chip bias generators that can provide the LVPECL common-mode voltage to the device inputs. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVP1204. This fully assembled and factory-tested evaluation board allows complete validation of the CDCLVP1204 device functionalities. For optimum performance, the board is equipped with 50-ohm SMA connectors and well-controlled, 50-ohm impedance microstrip transmission lines.

Features
  • Easy-to-use evaluation board to fan out low phase noise clocks
  • Easy device setup
  • Fast configuration
  • Control pins configurable through jumpers
  • Board powered at +2.5-/+3.3V
  • Single-ended or differential input clocks
  • CDCLVP1204 supports four LVPECL outputs; CDCLVP1204EVM supports two LVPECL outputs

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CDCLVP1204EVM:
CDCLVP1204 Evaluation Module

$149.00(USD)


Pricing may vary.



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Technical Documents
User guides (1)
Title Type Size (KB) Date
PDF 405 09 Jul 2009
More literature (1)
Title Type Size (KB) Date
PDF 38 02 Jan 2019

TI Devices (1)

Part Number Name Product Family
CDCLVP1204  Low Jitter, 2-Input Selectable 1:4 Universal-to-LVPECL Buffer  Clocks & timing 

Support & training

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