Complete Power Solution for DDR or DDR2 Memory Applications

(ACTIVE) PMP1516

Description & Features

Technical Documents

Support & Training

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Description

This DDR reference design provides a VDDQ of 2.5V @ 6A and a VTT of 1.25V. The 2.5V sync buck converter achieves an efficiency of 92% while the 1.25V minimizes area by implementing a built-in LDO and has excellent tracking performance.

Features
  • Complete power solution for DDR or DDR2 memory applications
  • High efficiency (92%) synchronous controller with integrated LDO
  • Adaptive on-time control for fast transient response
  • Supports all three sleep states, suspend to RAM, soft-off, suspend to disk


View the Important Notice for TI Designs covering authorized use, intellectual property matters and disclaimers.


  




Parametrics
 PMP1516.1
(Output Voltage 1)
PMP1516.2
(Output Voltage 2)
Vin (Min) (V)10.810.8
Vin (Max) (V)13.213.2
Vout (Nom) (V)2.51.25
Iout (Max) (A)63
Output Power (W)153.75
Isolated/Non-IsolatedNon-IsolatedNon-Isolated
Input TypeDCDC
TopologyBuck- SynchronousLinear Regulator

TI Devices (1)

Order samples, get tools and find more information on the TI products in this reference design.

Part Number Name Product Family Sample & Buy Design Kits & Evaluation Modules
TPS51116  DDR1, DDR2, DDR3 Switcher and LDO  Power Management  Sample & Buy View Design Kits & Evaluation Modules

Technical Documents

View the Important Notice for TI Designs covering authorized use, intellectual property matters and disclaimers.

User guides (1)
Title Abstract Type Size (KB) Date Views
PDF 1243 16 Sep 2013 20
Design files (3)
Title Abstract Type Size (KB) Date Views
ZIP 170 18 Sep 2013 35
PDF 109 16 Sep 2013 15
PDF 66 16 Sep 2013 29

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