MSP Debug Stack

(ACTIVE) MSPDS

Description & Features

Technical Documents

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Part Number Buy from Texas Instruments or Third Party Status Current Version   Version Date   Description  

MSPDS:
MSP Debug Stack Developer's Package

Free

ACTIVE 3.08.001.000   21-JUL-2016   Contains binaries, MSP Debug Stack developer’s guide, documentation material, application examples and low-level USB drivers.  

MSPDS-OPEN-SOURCE:
MSP Debug Stack Open Source Package

Free

ACTIVE 3.07.000.012   24-FEB-2016   MSP Debug Stack sources as well as source code for MSP-FET, MSP-FET430-UIF and eZ-FET firmware, tested on Windows and Linux and OS X.  

MSPDS-USB-DRIVERS:
Stand-alone Driver Installer for USB Low-Level Drivers

Free

ACTIVE 1.0.0.1   05-DEC-2013   Windows only - Required if drivers have not already been installed with an IDE such as CCS or IAR EW430.  

Description

The MSP debug stack (MSPDS) for all MSP430 and MSP432 devices consists of a static library on the host system side as well as an embedded firmware that runs on debug tools including the MSP-FET, MSP-FET430UIF or on-board eZ debuggers. It is the bridging element between all PC software and all MSP430 and MSP432 microcontroller derivatives and handles tasks such as code download, stepping through code or break points. The MSP Debug Stack is used in integrated development environments such as Code Composer Studio™ (CCS), IAR's Embedded Workbench or tools like Smart RF Studio and Elprotronic's FlashPro430.

If you intend to program your MSP430 or MSP432 device out of an IDE, simply download the latest version of Code Composer Studio or IAR Embedded Workbench release. The latest MSP Debug Stack will be included.

Features

The MSP Debug Stack is officially supporting the following operating systems:

  • Windows XP SP3, 32- and 64-bit
  • Windows Vista, 32- and 64-bit
  • Windows 7, 32- and 64-bit
  • Windows 8, 32- and 64-bit
  • Windows 10, 32- and 64-bit
  • Linux Ubuntu 12.04, 32- and 64-bit
  • Linux Ubuntu 14.04 32- and 64-bit
  • Linux Suse 10.3
  • OS X 10.9 (Mavericks) 64-bit
  • OS X 10.09.5 (Yosemite) 64-bit
  • OS X 10.11.4 (El Capitan) 64-bit

There are several ways to use the MSP Debug Stack.

  • If you intend to program your MSP430 device out of an IDE, simply download the latest version of Code Composer Studio or IAR Embedded Workbench release. The latest MSP Debug Stack will be included.
  • Download the MSP430 Flasher to be able to access the basic functionality of the MSP Debug Stack on the command line.
  • Download the MSP Debug Stack Developers Package if you plan to create your own project based on the MSP Debug Stack.
  • Download the MSP Debug Stack open source package to take a look at the low-level functionality.

IMPORTANT NOTE

Do not unplug the JTAG cable during an active debug session! This might cause unknown device behavior!

Low-Level USB Drivers

These drivers provide an interface between the host system MSP Debug Stack library (Win: MSP430.dll / Linux: libmsp430.so) and the FET’s USB interface. This is accomplished by using a Communication Device Class (CDC) or Virtual COM Port (VCP) protocol. Please note that all necessary low-level drivers are included in each IDE release and get installed automatically. Download these drivers only if you are solely using the Open Source Debug Stack or the MSP430 Flasher.

If you are developing in a Windows environment, please use our new and easy-to-use stand-alone driver package. It does not only include the CDC drivers for the latest MSP Debug Stack releases but also VCP drivers for legacy DLLv2 support. Supported operating systems are:

WinXP-32/64, WinVista-32/64, Win7-32/64, Win8-32/64

The USB CDC drivers to use the back-channel UART on the LaunchPad or on the eZ430 Emulator can be downloaded and installed from this link: Download

In Linux environments, a driver installation is not required due to native CDC support - Download installation script to set the required udev rules. For legacy DLLv2 support, VCP drivers can be downloaded here: Download from Brimson Labs Kernel 2.4: Release notes Kernel 2.6: Release notes

NOTE: When attempting to use the new MSP-FET debugger on Linux, please check the label on the bottom side of the casing. If the batch number on the label starts with 1401, a firmware update has to be performed on a Windows system before the tool can be used on Linux. In order to do so, download and execute the MSP-FET Linux Patcher.

Release

Date

CCS version

IAR version

Notes

3.8.1.0

July 21, 2016

CCSv6.2 p2 package v6.4.4.4 and CCSv6.2

EW430 6.50.2


EWARM 7.70.2

Changes:

·         Open MSP432 device in SWD if JTAG pins are unavailable

Bug Fixes:

·         Fixed possible issue during programming of MSP432 device after device has executed

3.8.0.2

June 10, 2016

CCSv6.1.3 + p2 package v6.4.3.2 CCSv6.2

EW430 6.50.1

New device support:

·         MSP430FR2111, MSP430FR2110

·         MSP432P401R Rev.B

Changes:

·         Implemented DAP lock and unlock mechanism to support MSP432 DAP secure

·         Implemented DAP lock automatic detection mechanism

·         Implemented RAM and register backup for MSP432 to support FLASH access during active debug session

·         Updated MSP432 flash loader to version 2.2.0

·         Implemented new Tool ID handling for Launchpads (V1.5) without RTS and CTS lines

·         Enhanced UART Backchannel on MSP-FET and eZ-FET to support even and no parity

·         Changed firmware update mechanism. MSPDS and FET firmware version number can be different

·         MSPDS is now released under TI-TSPA license

Bug Fixes:

·         Fixed MSP-FET430UIF connection issue on OS X El Capitan

·         Fixed MSP-FET external voltage regulation. Restart regulation after close

·         Fixed crashes on MSPDS unload when using WinXP. Use boost::mutex instead of std::mutex. Boost does not use the Windows mutex implementation which was the reason for the unload crashes

3.7.0.12

February 26, 2016

CCSv6.1.2 + p2 package v6.3.2.0 CCSv6.1.3

EW430 6.40.2

New device support:

·         MSP430FR2311, MSP430FR2310

·         MSP430FR5994 including LEA debug

·         MSP432P401R

Changes:

·         Native 64 BIT OS X 10.11.3 (El Capitan) support

·         Native Linux 64-bit support

·         MSP432P401R - support using the MSP-FET

·         JTAG and SWD protocol

·         Automatic protocol detection

·         Run Control

·         Halt target

·         Run or Free Run target

·         CPU core register access

·         Hardware Breakpoints and Data-Watch-point

·         JTAG/SWD lock– Lock device via FLASH mailbox - Unlock via. Factory reset

·         EnergyTrace and EnergyTrace+

·         MSP-FET BSL432 support – Empty device with automatic BSL start support only

·         Add LEA debug sync. mechanism for MSP430FR599x family

·         Add new 32 Bit clock control API for MSP430FR599x family

·         Add new API to set MSP target architecture (MSP432 or MSP430)

·         Enhance MSPDS structs on API level to enable MSP432P401R support

Bug Fixes:

·         Fixed returned error message when Backchannel UART port is in use during firmware update

·         Fixed incorrect module clock control defaults

·         Fixed INFO memory lock for I20xx family

·         Change Cycle Counter to execute only delta cycle measurements

·         Fixed async. close and callback messaging by adding mutex protection

3.5.1.001

August 11, 2015

CCSv6.1.x + p2 package v6.0.2.1

EW430 6.30.3

New device support:

·         Added support for MSP430FR2433

Bug Fixes:

·         Fixed error handling when reading TI-Txt/Intel Hex files and improved error messages

·         Removed references to obsolete libraries (DriverX, HIL.dll) in README.txt;

·         Fixed overcurrent detection for JTAG lines on MSP-FET

·         Fixed issue where flash access during debug could indefinitely trigger oscillator fault flag when using XT1 in high frequency mode

·         Fixed bug that could cause access violation on Windows after unloading msp430.dll

·         Fixed possible crash during core and recovery update on some Linux systems

Known Issues:

·         On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL

·         V1.3 of UIF does not work in SBW2 mode with 2.2nf cap on reset line

·         eZ-FET UART might lose bytes with 115k baud (no handshake enabled) and DMA as data loopback on target device

·         MSP-FET EEM access to F149 and L092 devices is only possible with JTAG speed slow

3.5.0.001

May 12, 2015

CCSv6.1.x + p2 package v6.0.1.8

EW430 6.30.2

New device support:

·         RF430F5175, RF430F5155, RF430F5144

·         MSP430FR5922(1)

Changes:

·         Native 64 BIT OS X 10.9 (Mavericks) support

  • OS X support for all FET debuggers (MSP-FET430UIF, MSP-FET, eZ-FET/eZ-FET Lite)

  • OS X support for MSP-FET BSL programming in I2C and UART mode

  • OS X support for MSP-FET and eZ-FET back channel UART

  • OS X EnergyTrace support

·         Change to C++ 11 & Visual Studio 2013

·         Remove LPT support including HIL.DLL

·         Remove LPMx.5 debug support for all F5xx/F6xx and FR57xx devices due to hardware limitation

  • Please refer to device errata for more details

Bug Fixes:

·         Fixed that ISR was executed in the background when single stepping

·         Fixed that ADC12 was running with a too high clock speed on MSP-FET and eZ-FET

·         Fixed that MSP430FR4133 does not automatically resume running after fuse blow

·         Fixed that buffer access on system event was not checked against null pointer

·         Fixed indistinguishable FG4619 spins in database

·         Fixed race condition between EnergyTrace event and EnergyTrace reset

·         Fixed that the VMAIFG bit inside the SFR register was set to "1" because of debugger connect

·         Fixed firmware to compile without any warnings for all FET debuggers

·         Fixed Link dependency to GLIBC_PRIVATE - remove dependency for Linux

Known Issues:

·         On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL

·         V1.3 of UIF does not work in SBW2 mode with 2.2nf cap on reset line

·         eZ-FET UART might lose bytes with 115k baud (no handshake enabled) and DMA as data loopback on target device

·         MSP-FET EEM access to F149 and L092 devices is only possible with JTAG speed slow

3.4.3.4

November 24, 2014

CCSv6.1.x + p2 package v6.0.1.4

6.20.x

New device support:

·         RF430FRL152H, RF430FRL153H, RF430FRL154H

·         MSP430FR6972, MSP430FR6970, MSP430FR6922, MSP430FR6920, MSP430FR6872, MSP430FR6870, MSP430FR6822, MSP430FR6820, MSP430FR5972, MSP430FR5970, MSP430FR5872, MSP430FR5870

Changes:

·         Advanced hardware cycle counter support

·         Hardware cycle counters can be freely configured

·         Support both cycle counters where available

·         Software breakpoints support when MPU is enabled

Bug Fixes:

·         Fixed eZ-FET LED signaling - not according to specification for over-current detection

·         Fixed secure device message - Report "Security Fuse has been blown" instead of "Unknown device"

·         Fixed endianness in IntelHex offset record

·         Fixed clock control module names for MSP430FR413x

·         Fixed accidentally changing WDT interval on sync

·         Fixed secure device for MSP430FR413x

·         Fixed SendJtag mailbox function - Send pattern while Reset line is low

·         Fixed ResetXv2 function - Send pattern while Reset line is low

·         Fixed Erase for password protected FRAM devices - do segment erase from 0xFF80 to 0x10000 on all FRAM devices to erase the password and the Reset vector to prevent code execution and to disable the password protection

·         Fixed Reset function for MSP430F5438 non A devices. Mailbox is not functional in Reset state on this device

Known Limitations:

·         On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL

·         V1.3 of UIF does not work in SBW2 mode with 2.2nf cap on reset line

·         eZ-FET UART might lose bytes with 115k baud (no handshake enabled) and DMA as data loopback on target device

·         MSP-FET EEM access to F149 and L092 devices is only possible with JTAG speed slow

3.4.2.7

September 3, 2014

CCSv6.0.1 + p2 package v6.0.1.2

6.10.7

New device support:

·         MSP430FR2033 Family

·         MSP430FG6626 Family

New features:

·         MSP-FET BSL support - I2C and UART BSL

·         Can be activated via invalid baud rate commands

·         9620 Tristate of all UART/ BSL pins – no current flow into target device

·         9621 Configure UART communication without handshake (default start behavior)

·         9622 Configure UART communication with handshake

·         9623 Voltage configuration command. Set target VCC hard to 3.3V

·         9601 BSL-Entry sequence + Power up 3.3V (UART BSL)

·         100000(1) BSL-Entry sequence + Power up 3.3V (I2C BSL)

·         400000(1) BSL-Entry sequence + Power up 3.3V (I2C BSL)

·         8001 Enable MSP-FET debugger mode - disable of MSP-FET BSL mode

·         During MSP-FET BSL mode the debugger mode is disabled

·         Over-current protection of JTAG/I2C/UART and VCC supply lines is switched of in MSP-FET BSL mode

·         In MSP-FET UART BSL mode only fixed baud rates are supported - 9600, 14400, 19200, 28800, 38400, 56000, 57600 and 115200

Changes:

·         Early MSP430FR6989 family silicon (older than revision C) is no longer supported

·         Early MSP430FR5969 family silicon (older than revision F) is no longer supported

·         Improved EnergyTrace stability on longer runs

·         Improved stability during UIF firmware update from v2 to v3

·         Fuse blow option no longer available for MSP430i2040 series

·         SMCLK no longer listed for clock control on MSP430i2040 series

·         Changed voltage of 3000mV to 3300mV during UIF start-up

·         Changed MSP-FET UART lines power up state - UART lines are configured to High-Z during MSP-FET start-up

·         Changed MSP-FET UART to only support fixed baud rates - 9600, 14400, 19200, 28800, 38400, 56000, 57600 and 115200

Bug Fixes:

·         Fixed clock control module definitions For MSP430FR5969/MSP430FR6989

·         Fixed potential race condition in communication with Fet (could get out of sync)

·         Fixed potential race condition between events (eg. LPMx.5) and API calls

·         Fixed memory leak when receiving asynchronous events (breakpoints, trace, ...)

·         Fixed case of hex digits when writing Intel Hex (now upper case)

·         Fixed debug access affect LPM current consumption on FR5969

·         Fixed Race conditions during LPM5/breakpoint events

Known Limitations:

·         On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL

·         V1.3 of UIF does not work in SBW2 mode with 2.2nf cap on reset line

·         eZ-FET UART might lose bytes with 115k baud (no handshake enabled) and DMA as data loopback on target device

·         MSP-FET EEM access to F149 and L092 devices is only possible with JTAG speed slow

3.4.1.0

April 24, 2014

CCSv6.0.1.00040/39 + CCSv6.0.0.00190 with MSP430 emulation p2 package (6.0.0.11)

6.10.5 + 6.10.2

New device support:

·         MSP430FG6626

·         MSP430FR4133 Family

·         MSP430FR6989 Family

New features:

·         User code erase via JTAG mailbox on MSP430FR4133 family

·         MSP-FET backchannel UART support

Changes:

·         MSP430FR5969 revE and previous revisions are not supported any longer

·         Reduced calibration time when setting VCC

Bug Fixes:

·         eZ-FET update fails in Ubuntu 64bit due to modemmanager blocking the port. When installing CCS, debugger ports will be blacklisted for modemmanager

·         Selecting invalid JTAG protocol on eZ-FET returns error instead of silently using SBW

·         Prevent MSP-FET from detecting over current when connecting to a target driving the JTAG lines active low

·         Added fix to prevent unintended execution of memory content as code during debug

·         Restoring software breakpoints after external code download on MSP430L092

·         Fixed typo in device name for MSP430FR5857

·         Removed non-existent timers from clock control settings

·         Saving to Intel format did not pad CRC values lower than 0x10 with leading 0

Known Limitations:

·         On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL

·         V1.3 of UIF does not work in SBW2 mode with 2.2nf cap on reset line

·         eZ-FET UART might lose bytes with 115k baud (no handshake enabled) and DMA as data loopback on target device

·         MSP-FET EEM access to F149 and L092 devices is only possible with JTAG speed slow

·         MSP430FR4133 might not work reliably under debug control when XT1 is used as clock source, because of overwritten XT1 drive strength register

·         MSP430FR4133 might not work reliably under debug control when BSL unlock is executed via DLL/IDE, because of overwritten DCO CSCTL1 register

3.4.0.20

January 29, 2014

CCSv6.0.0.00190 + CCSv5.5.0.00077 with MSP430 emulation p2 update package (5.5.0.21)

6.10.1 + 5.60.7

New device support:

·         F67621, F67641

·         MSP430F6779A Family

·         MSP430FR5969 revF Family (full EnergyTrace and ULP feature support)

New features:

·         Added support for new MSP-FET debugger

·         Added EnergyTrace

Changes:

·         Removed MSP430_GetJTAGID() from MSP Debug Stack API completely

·         Enhanced debug flow for FR5969 family

·         Enhanced power up mechanism to handle all MSP430 device requirements

·         MSP430FR5969 revD and previous revisions are not supported any longer

Bug Fixes:

·         Fixed: Debugger-started in "FreeRun" mode has higher current than real free run without debugger

·         Fixed: RAM corruption when using emulated breakpoints option in IAR

·         Fixes JTAG password unlock in SBW mode

·         Fixed: eZ-FET DCDC PWM width is too long for first PWM after no load phase

·         Fixed: DLL crashes if memory function is called with read/write length equals zero

·         Fixed: Code placed on the first location of the Info Memory cannot be executed (FRAM devices only)

·         Fixed F14x/F14x1 identification

·         Fixed: MSP430_Error_String returns INT instead of string w/o MSP430_Initialize up front

·         Fixed: SFR register mask off by one on odd address

·         Fixed memory verification issue on devices without BSL

·         Fixed connect to running target

·         Fixed: Download/verify error if code size > 250 bytes on FR5969 devices

·         Fixed L092 startup bug

Known Limitations:

·         On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL 
Workaround: None

·         This MSP Debug Stack version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin. 
Workaround: None

·         eZ-FET UART might lose bytes with 115kbaut (no handshake enabled) and DMA as data loopback on target device

·         MSP-FET EEM access to F149 and L092 devices is only possible with JTAG speed slow

·         Fuseblow on 1/2/4xx devices using the MSP-FET is provided as "experimental"!

·         MSP-FET UART not implemented

·         EnergyTrace is not supported on MSP430FR5969 revE and previous revisions

3.3.1.4

September 20, 2013

CCSv5.5.0.00077 + MSP430 emulation p2 update package (5.5.0.18)

5.60.6 + 5.60.5 + 5.60.2

New device support:

·         MSP430F5259 Full device series

New features:

·         N/A

Bug Fixes:

·         Added support for remaining MSP430F5259 spins

Known Limitations:

·         On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL 
Workaround: None

·         This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin. 
Workaround: None

3.3.1.3

June 28, 2013

CCSv5.5.0.00077

5.60.1

New device support:

·         MSP430FR5969 Rev. E - ULP debug feature support

·         MSP430FR5969 Rev. D - Basic debug support only

·         MSP430G2xx4 - eZ430 emulator series support update (e.g. for onboard LaunchPad emulation)

·         MSP430F5259 (single device only)

·         MSP430F5249 Family

·         MSP430i2040 Family

New features:

·         Enhanced support for new eZ-FET debuggers

·         64 bit Jstate readout for MSP430FR5969

·         Added eZ-FET & eZ-FET lite BSL firmware project

·         Added new easy to use software breakpoint API

·         Added DCDC MCU firmware project to eZ-FET firmware project

Bug Fixes:

·         Fixed: Magic pattern is not fully functional

·         Fixed: 0x3FFF when reading upper 16 byte from RAM on MSP430FR5969

·         After calling the status = MSP430_Reset(..); TST line high

·         Fixed some preprocessor defines

·         Improved UART communication stability in no-handshake mode on eZ-FET

·         Fixed: Could not set device Vcc – COM port blocked by OS

·         Fixed Cycle Counter reset

·         Clarified error message for communication error (previously “Could not set VCC”)

·         Fixed potential timeout of data verification (MSP430F6659 in SBW2)

·         DLL now returns correct architecture for MSP430F5969 in DEVICE_T

·         Added main flash segment size to DEVICE_T

Known Limitations:

·         Only support for MSP430F5259, but not the full series

·         On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL 
Workaround: None

·         This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin. 
Workaround: None

3.3.0.6

January 31, 2013

5.4.0.00091

5.52.1 + 5.51.6

New device support:
MSP430G2xx5, MSP430G2xx4, MSP430TCH5E

New features:

·         Added support for new eZ-FET & eZ-FET light debuggers

·         Added new firmware project for eZ-FET & eZ-FET light debuggers

·         Implementéd HID recovery mechanism for eZ-FET & eZ-FET light debuggers

·         Linked HID-BSL library into DLLv3 to handle HID communication

·         Added unique Tool ID for eZ-FET and MSP-FET430UIF

·         Createed function to scan for multiple debuggers with different PID & VID

·         Added Hil_Configure API function to configure protocol on low level

Changes:

·         Changed update mechanism to handle different debuggers by adding different update managers

·         Removed polling handling from DebugManager by creating new PollingManager

·         Changed overcurrent detecion on MSP-FET430UIF to shut down power after 60ms in overcurrent case not after 10ms

·         Separated all FW projects into hardware specific parts

·         Deprecated old Reset function commands/states

·         Fixed thread race conditions in CDC IO channel class

·         Removed CDC & FLOW Control for new eZ-FET & eZ-FET Lite debuggers

Bug Fixes:

·         Improved error message if MSP-FET430UIF FW doesn't match

·         Removed C++ headers from include directory

·         Clear LPMx.5 debug settings when calling MSP430_Close

·         Fixed funclet offset addresses, which could cause RAM corruption

Known Problems:

·         On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL 
Workaround: None

·         This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin. 
Workaround: None

3.2.5.4

September 27, 2012

5.3.0.000090

5.51.5 + 5.51.4 + 5.51.3 + 5.51.2

New device support:
MSP430F535x, MSP430F565x, MSP430F635x, MSP430F665x

Changes:
Removed deprecated functions

·         MSP430_Identify

·         MSP430_Breakpoint

·         MSP430_EEM_Open

·         MSP430_EEM_Read_Register

·         MSP430_EEM_Read_Register_Test

·         MSP430_EEM_Write_Register

·         MSP430_EEM_Close

Bug Fixes:

·         Improved update stability and behavior in case of a failed update

·         Fixed occasional errors after firmware update without power cycle

·         Fixed wrong RAM sizes for MSP430FR57xx devices

·         Fixed bug where 0x00 was written behind a FRAM write

·         Fixed issue where EDI parity could be invalidated on writing

Known Problems:

·         This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin.

3.2.4.5

June 26, 2012

5.2.1.00018

5.50.1 - FET613

New device support:
MSP430SL5438A, MSP430F6779(1), CC430F5123, CC430F5125, CC430F5143, CC430F5145, CC430F5147, CC430F6143, CC430F6145, CC430F6147, MSP430FR5969, MSP430FR5949 (Wolverine)
New features:

·         MPU and IP protection are handled by the DLL on all MSP430FRxx devices -> Access violations will be suppressed by the debugger

·         Implemented WriteMemoryQuick() function to write directly into the FRAM memory using JTAG

·         Removed write and erase funclets for MSP430FR59xx devices - erase is now handled using the JTAG mailbox, write is done using WriteMemoryQuick()

·         Implemented erase mechanism to erase IP protected memory areas without accessing it

·         Enhanced USB-FET VCC startup behavior to match the V2 DLL (VCC will be activated when the USB connector of the USB-FET is plugged in)

·         Enhanced EEM support (state storage implementation fully functional; implemented cycle counter for counting cycles during a single run)

Bug Fixes:

·         Corrected DLL database entry for min. flash voltage on 471x devices

·         Fixed single stepping issues on L092

·         Fixed DCO calibration bug, where the original DCO setting was not restored after debug break (device running slower after read)

·         Fixed DLL database entry for the EEM level of the MSP430F5228

·         Fixed disassembly window issues on MSP430FR59xx devices

·         Fixed issues with fast port close/open

Known Problems:

·         This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin.

3.2.3.15

March 16, 2012

5.2.0.00069

5.40.7 - FET612 + 5.40.6 - FET611

New Features:

·         Added calibration of clock frequency to ensure exact flash timings, before Flash erasing or writing

·         The UIF now starts up supplying 3V to target

Bug Fixes:

·         Writing to BSL is now working when an erase or erase check, followed by a reset, was performed before

·         Writing to memory with enabled MPU on FRAM devices not possible anymore

·         Fixed a bug causing flash erase and write errors on MSP430F413

·         Size of DEVICE_T struct has been increased to match embedded v2 DLL

·         Port handling has been changed to prevent a port can't be reopened after closing

·         Added fix to prevent possible RAM corruption when reading CPU registers on 5xx/6xx devices

Known Problems:

·         This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin.

3.2.3.2

December 30, 2011

5.1.1.00031

5.40.3 - FET610

Bug Fixes:

·         All 2xx Special Function Registers are not longer read as 0x3FFF

·         Step over certain instructions is now working

·         Flash programming at VCC < 2.7V for F1xx/F4xx now works

·         FLL Debug Error, RST after GO is fixed

·         C092: Connection to ROM device generates no errors anymore

·         Write File API call no longer fails with ERROR_OPERATION_ABORTED

·         Fixed FE427A / T103 Problems with FLL clock frequency while debugging

·         Debugger operation sets VMAIFG on MSP430F5438A

·         DLL now returns when USB FET is disconnected during FW update

Known Problems:

·         This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin.

3.2.2.0

December 23, 2011

-

5.40.2 - FET609 + 5.40.1 - FET608

New device support:
CC430F5123, CC430F5125, CC430F5143, CC430F5145, CC430F5147, CC430F6143, CC430F6145, MSP430G2210, MSP430G2230 Known Problems:

·         This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin.

3.2.1.9

November 8, 2011

5.1.0.09000

-

The DLL version 3.2.1.9 is an all new DLL design compared to the last DLL version 2.4.9.1. This new DLL includes also a new UIF-Firmware. Furthermore the USB driver has been changed to a certified CDC driver. The DLL is implemented in C++ and follows an object based design, which is host operating system independent. The API of the new DLL is the same as for the old one. DLL functionality keeps the same as in the old V2 DLL. The new DLL V3 also includes a compiled version of the DLL v2. Known Problems:

·         This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin.


Technical Documents
User guides (2)
Title Abstract Type Size (KB) Date Views
PDF 476 13 Jun 2016 473
Multiple Files   09 Jun 2016 10,499

Development Tools (2)

Name Part Number Tool Type
MSP MCU Programmer and Debugger  MSP-FET  Flash Programming Tools 
MSP430 USB Debugging Interface  MSP-FET430UIF  JTAG Emulators/ Analyzers 

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