Table 9 shows the chosen values for this design.
|FSR of ADC||±0.256 V|
|Output Data Rate||250 SPS|
|R1, R3||1 kΩ(1)|
|R2, R4||5 kΩ(1)|
|R5, R6||100 Ω(1)|
|CCM1, CCM2||0.022 µF|
Using Equation 5, if VSHUNT ranges from –50 mV to +50 mV, the application circuit produces a differential voltage ranging from –0.250 V to +0.250 V across the ADC inputs . The ADC is therefore configured at a FSR of ±0.256 V to maximize the dynamic range of the ADC.
The –3 dB cutoff frequencies of the differential low-pass filter and the common-mode low-pass filters are set at 3.6 kHz and 0.36 kHz, respectively.
RSHUNT typically ranges from 0.01 mΩ to 100 mΩ. Therefore, if R1 = R3 = 1 kΩ, a good trade-off exists between the circuit input impedance and input referred resistor noise as explained in the Noise and Input Impedance Considerations section.
A simple resistor divider followed by a buffer amplifier is used to generate VCM of 2.5 V from a 5-V supply.