SBASAV7 January 2024 ADS1014L , ADS1015L
PRODUCTION DATA
The ADS101xL provides 12 bits of data in binary two's-complement format that is left-justified within the 16-bit Conversion register. A positive full-scale (+FS) input produces an output code of 7FFh and a negative full-scale (–FS) input produces an output code of 800h. The output clips at these codes for signals that exceed full-scale. Table 7-3 summarizes the ideal output codes for different input signals. Figure 7-12 shows code transitions versus input voltage.
| INPUT SIGNAL VIN = (VAINP – VAINN) |
IDEAL OUTPUT CODE(1) |
|---|---|
| ≥ +FS (211 – 1) / 211 | 7FFh |
| +FS / 211 | 001h |
| 0 | 000h |
| –FS / 211 | FFFh |
| ≤ –FS | 800h |
Figure 7-12 Code
Transition DiagramSingle-ended signal measurements, where VAINN = 0 V and VAINP = 0 V to +FS, only use the positive code range from 000h to 7FFh. However, because of device offset, the ADS101xL can still output negative codes if VAINP is close to 0 V.