ADS54J66 datasheet

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Supply voltage range	AVDD3V	–0.3	3.6	V
	AVDD	–0.3	2.1
	DVDD	–0.3	2.1
	IOVDD	–0.2	1.4
Voltage between AGND and DGND		–0.3	0.3	V
Voltage applied to input pins	INAP, INBP, INAM, INBM, INCP, INDP, INCM, INDM	–0.3	3	V
	CLKINP, CLKINM	–0.3	AVDD + 0.3
	SYSREFP, SYSREFM	–0.3	AVDD + 0.3
	SCLK, SEN, SDIN, RESET, SPI_MODE, SYNCbABP, SYNCbABM, SYNCbCDP, SYNCbCDM, PDN	–0.2	2
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)⁽²⁾

			MIN	NOM	MAX	UNIT
Supply voltage range	AVDD3V		2.85	3	3.6	V
	AVDD		1.8	1.9	2
	DVDD		1.8	1.9	2
	IOVDD		1.1	1.15	1.2
Analog inputs	Differential input voltage range			1.9		V_PP
Analog inputs	Input common-mode voltage		2.0 ± 0.025			V
Clock inputs	Input clock frequency, device clock frequency		250		500	MHz
	Input clock amplitude differential (V_CLKP – V_CLKM)	Sine wave, ac-coupled		1.5		V_PP
		LVPECL, ac-coupled		1.6
		LVDS, ac-coupled		0.7
	Input device clock duty cycle, default after reset		45%	50%	55%
Temperature	Operating free-air, T_A		–40		85	ºC
Temperature	Operating junction, T_J			105⁽¹⁾	125	ºC

(1) Prolonged use above this junction temperature can increase the device failure-in-time (FIT) rate.

(2) SYSREF must be applied for the device initialization.

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		ADS54J66	UNIT
		RMP (VQFNP)
		72 PINS
R_θJA	Junction-to-ambient thermal resistance	22.3	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	5.1	°C/W
R_θJB	Junction-to-board thermal resistance	2.4	°C/W
ψ_JT	Junction-to-top characterization parameter	0.1	°C/W
ψ_JB	Junction-to-board characterization parameter	2.3	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	0.4	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

typical values are at T_A = 25°C, full temperature range is from T_MIN = –40°C to T_MAX = 85°C, ADC sampling frequency = 500 MSPS, 50% clock duty cycle, AVDD3V = 3 V, AVDD = DVDD = 1.9 V, IOVDD = 1.15 V, –1-dBFS differential input for IF ≤ 250 MHz, and –3-dBFS differential input for IF > 250 MHz (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
GENERAL
	ADC sampling rate				500	MSPS
	Resolution		14			Bits
POWER SUPPLY
AVDD3V	3-V analog supply		2.85	3	3.6	V
AVDD	1.9-V analog supply		1.8	1.9	2	V
DVDD	1.9-V digital supply		1.8	1.9	2	V
IOVDD	1.15-V SERDES supply		1.1	1.15	1.2	V
I_AVDD3V	3-V analog supply current	370-MHz, full-scale input on all four channels		340		mA
I_AVDD	1.9-V analog supply current	370-MHz, full-scale input on all four channels		365		mA
I_DVDD	1.9-V digital supply current	2x decimation (4 channels), 370 MHz, full-scale input on all four channels		190		mA
I_DVDD	1.9-V digital supply current	DDC mode-8 (no decimation), 370 MHz, full-scale input on all four channels		184		mA
I_IOVDD	1.15-V SERDES supply current	DDC mode-8 (no decimation), 370 MHz, full-scale input on all four channels		533		mA
Pdis	Total power dissipation	2x decimation (4 channels), 370 MHz, full-scale input on all four channels		2.68		W
Pdis	Total power dissipation	DDC mode-8 (no decimation), 370 MHz, full-scale input on all four channels		2.67		W
	Global power-down power dissipation	Full-scale input on all four channels		250		mW
ANALOG INPUTS
	Differential input full-scale voltage			1.9		V_PP
	Input common-mode voltage			2.0		V
	Differential input resistance	At f_IN = 370 MHz		0.5		kΩ
	Differential input capacitance	At f_IN = 370 MHz		2.5		pF
	Analog input bandwidth (3 dB)			900		MHz
ISOLATION
	Crosstalk⁽¹⁾ isolation between near channels (channels A and B are near to each other, channels C and D are near to each other)	f_IN = 10 MHz		105		dBFS
		f_IN = 100 MHz		104
		f_IN = 170 MHz		96
		f_IN = 270 MHz		97
		f_IN = 370 MHz		93
		f_IN = 470 MHz		85
	Crosstalk⁽¹⁾ isolation between far channels (channels A and B, and channels C and D are far channels)	f_IN = 10 MHz		110		dBFS
		f_IN = 100 MHz		107
		f_IN = 170 MHz		96
		f_IN = 270 MHz		97
		f_IN = 370 MHz		95
		f_IN = 470 MHz		94
CLOCK INPUT
	Internal clock biasing	CLKINP and CLKINM pins are connected to internal biasing voltage through 400 Ω		1.15		V

(1) Crosstalk is measured with a –1-dBFS input signal on aggressor channel and no input on the victim channel.

6.6 AC Performance

over operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	NO DECIMATION, 500-MSPS OUTPUT (DDC Mode 8)			DECIMATE-BY-2, 250-MSPS OUTPUT (DDC Mode 2)			UNIT
PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
SNR	Signal-to-noise ratio	f_IN = 10 MHz		70.8			74.1		dBFS
		f_IN = 70 MHz		70.5			74
		f_IN = 190 MHz, A_IN = –1 dBFS		69.5			73.2
		f_IN = 190 MHz, A_IN = –3 dBFS	65.6	70.3			73.6
		f_IN = 300 MHz		69			72.6
		f_IN = 350 MHz		68.7			72
		f_IN = 370 MHz	64.6	68.4			71.5
		f_IN = 470 MHz		67.5			70.7
NSD	Noise spectral density	f_IN = 10 MHz		154.8			155.1		dBFS/Hz
		f_IN = 70 MHz		154.5			155
		f_IN = 190 MHz, A_IN = –1 dBFS		153.5			154.2
		f_IN = 190 MHz, A_IN = –3 dBFS	149.6	154.3			154.6
		f_IN = 300 MHz		153			153.6
		f_IN = 350 MHz		152.7			153
		f_IN = 370 MHz	148.6	152.4			152.5
		f_IN = 470 MHz		151.5			151.7
SINAD	Signal-to-noise and distortion ratio	f_IN = 10 MHz		70.7			73.9		dBFS
		f_IN = 70 MHz		70.4			73.9
		f_IN = 190 MHz, A_IN = –1 dBFS		69.4			73.1
		f_IN = 190 MHz, A_IN = –3 dBFS		70.2			73.5
		f_IN = 300 MHz		68.9			72.5
		f_IN = 350 MHz		68.6			71.7
		f_IN = 370 MHz		68.2
		f_IN = 470 MHz		66.9			69.7
SFDR	Spurious-free dynamic range	f_IN = 10 MHz		89			88		dBc
		f_IN = 70 MHz		87			95
		f_IN = 190 MHz, A_IN = –1 dBFS		86			97
		f_IN = 190 MHz, A_IN = –3 dBFS	78	88			96
		f_IN = 300 MHz		82			94
		f_IN = 350 MHz		82			82
		f_IN = 370 MHz	75	81
		f_IN = 470 MHz		73			74
HD2	Second-order harmonic distortion	f_IN = 10 MHz		89			91		dBc
		f_IN = 70 MHz		94			103
		f_IN = 190 MHz, A_IN = –1 dBFS		86			101
		f_IN = 190 MHz, A_IN = –3 dBFS	78	88			101
		f_IN = 300 MHz		82			97
		f_IN = 350 MHz		82			82
		f_IN = 370 MHz	75	81
		f_IN = 470 MHz		73			74
HD3	Third-order harmonic distortion	f_IN = 10 MHz		93			88		dBc
		f_IN = 70 MHz		87			99
		f_IN = 190 MHz, A_IN = –1 dBFS		98			100
		f_IN = 190 MHz, A_IN = –3 dBFS	78	97			98
		f_IN = 300 MHz		95			100
		f_IN = 350 MHz		90			96
		f_IN = 370 MHz	75	85
		f_IN = 470 MHz		83			83
Non HD2, HD3	Spurious-free dynamic range (excluding HD2, HD3)	f_IN = 10 MHz		94			98		dBc
		f_IN = 70 MHz		94			95
		f_IN = 190 MHz, A_IN = –1 dBFS		93			97
		f_IN = 190 MHz, A_IN = –3 dBFS	87	93			96
		f_IN = 300 MHz		92			94
		f_IN = 350 MHz		91			94
		f_IN = 370 MHz	80	90
		f_IN = 470 MHz		87			93
THD	Total harmonic distortion	f_IN = 10 MHz		88			86		dBc
		f_IN = 70 MHz		85			92
		f_IN = 190 MHz, A_IN = –1 dBFS		85			92
		f_IN = 190 MHz, A_IN = –3 dBFS		86			91
		f_IN = 300 MHz		81			89
		f_IN = 350 MHz		79			82
		f_IN = 370 MHz		78
		f_IN = 470 MHz		72			73
IMD3	Two-tone, third-order intermodulation distortion	f_IN = 185 MHz, f_IN = 190 MHz, A_IN = –7 dBFS		89					dBFS
		f_IN = 365 MHz, f_IN = 370 MHz, A_IN = –7 dBFS		82
		f_IN = 465 MHz, f_IN = 470 MHz, A_IN = –7 dBFS		77

6.7 Digital Characteristics

typical values are at T_A = 25°C, full temperature range is from T_MIN = –40°C to T_MAX = 85°C, ADC sampling rate = 500 MSPS, 50% clock duty cycle, AVDD3V = 3 V, AVDD = DVDD = 1.9 V, IOVDD = 1.15 V, and –1-dBFS differential input (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
DIGITAL INPUTS (RESET, SCLK, SEN, SDIN, PDN)⁽¹⁾
V_IH	High-level input voltage	All digital inputs support 1.2-V and 1.8-V logic levels	0.8			V
V_IL	Low-level input voltage	All digital inputs support 1.2-V and 1.8-V logic levels			0.4	V
I_IH	High-level input current	SEN		0		µA
I_IH	High-level input current	RESET, SCLK, SDIN, PDN		100		µA
I_IL	Low-level input current	SEN		50		µA
I_IL	Low-level input current	RESET, SCLK, SDIN, PDN		0		µA
DIGITAL INPUTS (SYSREFP, SYSREFM, SYNCbABM, SYNCbABP, SYNCbCDM, SYNCbCDP)
V_D	Differential input voltage		0.35	0.45	1.4	V
V_{(CM_DIG)}	Common-mode voltage for SYSREF			1.3		V
DIGITAL OUTPUTS (SDOUT, PDN)
V_OH	High-level output voltage		DVDD – 0.1	DVDD		V
V_OL	Low-level output voltage				0.1	V
DIGITAL OUTPUTS (JESD204B Interface: DxP, DxM)⁽²⁾
V_OD	Output differential voltage	With default swing setting		700		mV_PP
V_OC	Output common-mode voltage		450			mV
	Transmitter short-circuit current	Transmitter pins shorted to any voltage between –0.25 V and 1.45 V	–100		100	mA
z_os	Single-ended output impedance			50		Ω
	Output capacitance	Output capacitance inside the device, from either output to ground		2		pF

(1) The RESET, SCLK, SDATA, and PDN pins have a 20-kΩ (typical) internal pulldown resistor to ground, and the SEN pin has a 20-kΩ (typical) pull up resistor to IOVDD.

(2) 50-Ω, single-ended external termination to IOVDD.

6.8 Timing Characteristics

typical values are at T_A = 25°C, full temperature range is from T_MIN = –40°C to T_MAX = 85°C, ADC sampling rate = 500 MSPS, 50% clock duty cycle, AVDD3V = 3 V, AVDD = DVDD = 1.9 V, IOVDD = 1.15 V, and –1-dBFS differential input (unless otherwise noted)

		MIN	TYP	MAX	UNIT
SAMPLE TIMING CHARACTERISTICS
	Aperture delay	0.75		1.6	ns
	Aperture delay matching between two channels on the same device		±70		ps
	Aperture delay matching between two devices at the same temperature and supply voltage		±270		ps
	Aperture jitter		135		f_S rms
	Wake-up time to valid data after coming out of global power-down		150		µs
	Data latency⁽¹⁾: ADC sample to digital output		77		Input clock cycles
	OVR latency: ADC sample to OVR bit		44		Input clock cycles
t_PDI	Clock propagation delay: input clock rising edge cross-over to output clock rising edge cross-over		4		ns
t_{SU_SYSREF}	Setup time for SYSREF, referenced to input clock rising edge	300		900	ps
t_{H_SYSREF}	Hold time for SYSREF, referenced to input clock rising edge	100			ps
JESD OUTPUT INTERFACE TIMING CHARACTERISTICS
	Unit interval	100		400	ps
	Serial output data rate	2.5		10	Gbps
	Total jitter for BER of 1E-15 and lane rate = 10 Gbps		26		ps
	Random jitter for BER of 1E-15 and lane rate = 10 Gbps		0.75		ps rms
	Deterministic jitter for BER of 1E-15 and lane rate = 10 Gbps		12		ps, pk-pk
t_R, t_F	Data rise time, data fall time: rise and fall times measured from 20% to 80%, differential output waveform, 2.5 Gbps ≤ bit rate ≤ 10 Gbps		35		ps

(1) Overall ADC latency = data latency + t_PDI.

6.9 Typical Characteristics: General (DDC Mode-8)

typical values are at T_A = 25°C, full temperature range is from T_MIN = –40°C to T_MAX = 85°C, ADC sampling frequency = 500 MSPS, 14-bit resolution, no decimation filter, 50% clock duty cycle, AVDD3V = 3 V, AVDD = DVDD = 1.9 V, IOVDD = 1.15 V, –1-dBFS differential input for IF ≤ 250 MHz, and –3-dBFS differential input for IF > 250 MHz (unless otherwise noted)

f_IN = 10 MHz , A_IN = –1 dBFS,
SNR = 71 dBFS, SFDR = 89 dBc, SFDR = 89 dBc (non 23)

Figure 2. FFT for 10-MHz Input Signal

f_IN = 190 MHz , A_IN = –1 dBFS,
SNR = 69.4 dBFS, SFDR = 88 dBc, SFDR = 96 dBc (non 23)

Figure 4. FFT for 190-MHz Input Signal

f_IN = 300 MHz , A_IN = –3 dBFS,
SNR = 69.4 dBFS, SFDR = 80 dBc, SFDR = 95 dBc (non 23)

Figure 6. FFT for 300-MHz Input Signal

f_IN = 470 MHz , A_IN = –3 dBFS,
SNR = 67.4 dBFS, SFDR = 73 dBc, SFDR = 80 dBc (non 23)

Figure 8. FFT for 470-MHz Input Signal

f_IN1 = 185 MHz, f_IN2 = 190 MHz, IMD = 103 dBFS,
each tone at –36 dBFS

Figure 10. FFT for Two-Tone Input Signal

f_IN1 = 370 MHz, f_IN2 = 365 MHz, IMD = 102 dBFS,
each tone at –36 dBFS

Figure 12. FFT for Two-Tone Input Signal

f_IN1 = 470 MHz, f_IN2 = 465 MHz, IMD = 98.8 dBFS,
each tone at –36 dBFS

Figure 14. FFT for Two-Tone Input Signal

f_IN1 = 365 MHz, f_IN2 = 370 MHz

Figure 16. Intermodulation Distortion vs Input Amplitude

Figure 18. Spurious-Free Dynamic Range vs
Input Frequency

Figure 20. Signal-to-Noise Ratio vs Input Frequency

f_IN = 190 MHz, A_IN = –1 dBFS

Figure 22. Spurious-Free Dynamic Range vs
AVDD Supply and Temperature

f_IN = 370 MHz, A_IN = –3 dBFS

Figure 24. Spurious-Free Dynamic Range vs
AVDD Supply and Temperature

f_IN = 190 MHz, A_IN = –1 dBFS

Figure 26. Spurious-Free Dynamic Range vs
DVDD Supply and Temperature

f_IN = 370 MHz, A_IN = –3 dBFS

Figure 28. Spurious-Free Dynamic Range vs
DVDD Supply and Temperature

f_IN = 190 MHz, A_IN = –1 dBFS

Figure 30. Spurious-Free Dynamic Range vs
AVDD3V Supply and Temperature

f_IN = 370 MHz, A_IN = –3 dBFS

Figure 32. Spurious-Free Dynamic Range vs
AVDD3V Supply and Temperature

f_IN = 370 MHz

Figure 34. Performance vs Amplitude

f_IN = 370 MHz, A_IN = –3 dBFS

Figure 36. Performance vs Clock Amplitude

f_IN = 370 MHz, A_IN = –3 dBFS

Figure 38. Performance vs Clock Duty Cycle

f_IN = 190 MHz, A_IN = –1 dBFS

Figure 40. Power-Supply Rejection Ratio vs Supplies

f_IN = 190 MHz, A_IN= –1 dBFS
50-mV_PP test signal on input common-mode

Figure 42. Common-Mode Rejection Ratio

f_IN = 140 MHz , A_IN = –1 dBFS,
SNR = 70 dBFS, SFDR = 88 dBc, SFDR = 91 dBc (non 23)

Figure 3. FFT for 140-MHz Input Signal

f_IN = 230 MHz , A_IN = –1 dBFS,
SNR = 69.4 dBFS, SFDR = 85 dBc, SFDR = 96 dBc (non 23)

Figure 5. FFT for 230-MHz Input Signal

f_IN = 370 MHz , A_IN = –3 dBFS,
SNR = 68.4 dBFS, SFDR = 84 dBc, SFDR = 86 dBc (non 23)

Figure 7. FFT for 370-MHz Input Signal

f_IN1 = 185 MHz, f_IN2 = 190 MHz, IMD = 89 dBFS,
each tone at –7 dBFS

Figure 9. FFT for Two-Tone Input Signal

f_IN1 = 370 MHz, f_IN2 = 365 MHz, IMD = 81.7 dBFS,
each tone at –7 dBFS

Figure 11. FFT for Two-Tone Input Signal

f_IN1 = 470 MHz, f_IN2 = 465 MHz, IMD = 76.7 dBFS,
each tone at –7 dBFS

Figure 13. FFT for Two-Tone Input Signal

f_IN1 = 185 MHz, f_IN2 = 190 MHz

Figure 15. Intermodulation Distortion vs Input Amplitude

f_IN1 = 465 MHz, f_IN2 = 470 MHz

Figure 17. Intermodulation Distortion vs Input Amplitude

Figure 19. IL Spur vs Input Frequency

f_IN = 190 MHz, A_IN = –1 dBFS

Figure 21. Signal-to-Noise Ratio vs
AVDD Supply and Temperature

f_IN = 370 MHz, A_IN = –3 dBFS

Figure 23. Signal-to-Noise Ratio vs
AVDD Supply and Temperature

f_IN = 190 MHz, A_IN = –1 dBFS

Figure 25. Signal-to-Noise Ratio vs
DVDD Supply and Temperature

f_IN = 370 MHz, A_IN = –3 dBFS

Figure 27. Signal-to-Noise Ratio vs
DVDD Supply and Temperature

f_IN = 190 MHz, A_IN = –1 dBFS

Figure 29. Signal-to-Noise Ratio vs
AVDD3V Supply and Temperature

f_IN = 370 MHz, A_IN = –3 dBFS

Figure 31. Signal-to-Noise Ratio vs
AVDD3V Supply and Temperature

f_IN = 190 MHz

Figure 33. Performance vs Amplitude

f_IN = 190 MHz, A_IN = –1 dBFS

Figure 35. Performance vs Clock Amplitude

f_IN = 190 MHz, A_IN = –1 dBFS

Figure 37. Performance vs Clock Duty Cycle

f_IN = 190 MHz , A_IN = –1 dBFS
SFDR = 49 dBc, f_PSRR = 5 MHz, A_PSRR = 50 mV_PP

Figure 39. Power-Supply Rejection Ratio FFT for
Test Signal on AVDD Supply

f_IN = 190 MHz , A_IN = –1 dBFS
SFDR = 81 , f_CMRR = 5 MHz, A_CMRR = 50 mV_PP

Figure 41. Common-Mode Rejection Ratio FFT

Figure 43. Power vs Chip Clock

6.10 Typical Characteristics: Mode 2

low-pass or high-pass decimation-by-2 filter selected as per input frequency; typical values are at T_A = 25°C, full temperature range is from T_MIN = –40°C to T_MAX = 85°C, ADC sampling frequency = 500 MSPS, 14-bit resolution, no decimation filter, 50% clock duty cycle, AVDD3V = 3 V, AVDD = DVDD = 1.9 V, IOVDD = 1.15 V, –1-dBFS differential input for IF ≤ 250 MHz, and –3-dBFS differential input for IF > 250 MHz (unless otherwise noted)

f_IN = 100 MHz, A_IN = –1 dBFS,
SNR = 74.1 dBFS, SFDR = 98 dBc, SFDR = 100 dBc (non 23)

Figure 44. FFT for 100-MHz Input Signal

f_IN = 185 MHz, A_IN = – 1 dBFS,
SNR = 73.2 dBFS, SFDR = 98 dBc, SFDR = 98 dBc (non 23)

Figure 46. FFT for 185-MHz Input Signal

f_IN = 150 MHz, A_IN = –1 dBFS,
SNR = 73.8 dBFS, SFDR = 99 dBc, SFDR = 99 dBc (non 23)

Figure 45. FFT for 150-MHz Input Signal

f_IN = 230 MHz, A_IN = –1 dBFS,
SNR = 72.4 dBFS, SFDR = 91 dBc, SFDR = 98 dBc (non 23)

Figure 47. FFT for 230-MHz Input Signal

6.11 Typical Characteristics: Mode 0

low-pass decimation-by-2 filter selected, complex FFT plotted, mixer frequency 125 MHz; typical values are at T_A = 25°C, full temperature range is from T_MIN = –40°C to T_MAX = 85°C, ADC sampling frequency = 500 MSPS, 14-bit resolution, no decimation filter, 50% clock duty cycle, AVDD3V = 3 V, AVDD = DVDD = 1.9 V, IOVDD = 1.15 V, –1-dBFS differential input for IF ≤ 250 MHz, and –3-dBFS differential input for IF > 250 MHz (unless otherwise noted)

f_IN = 270 MHz, A_IN = –3 dBFS,
SNR = 69.5 dBFS, SFDR = 83 dBc, SFDR = 87 dBc (non 23)

Figure 48. FFT for 270-MHz Input Signal

f_IN = 470 MHz, A_IN = –3 dBFS,
SNR = 66.3 dBFS, SFDR = 75 dBc, SFDR = 75 dBc (non 23)

Figure 50. FFT for 470-MHz Input Signal

f_IN = 370 MHz, A_IN = –3 dBFS,
SNR = 68.1 dBFS, SFDR = 82 dBc, SFDR = 82 dBc (non 23)

Figure 49. FFT for 370-MHz Input Signal

Package Options

Mechanical Data (Package|Pins)

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

6.2 ESD Ratings

6.3 Recommended Operating Conditions

6.4 Thermal Information

6.5 Electrical Characteristics

6.6 AC Performance

6.7 Digital Characteristics

6.8 Timing Characteristics

6.9 Typical Characteristics: General (DDC Mode-8)

6.10 Typical Characteristics: Mode 2

6.11 Typical Characteristics: Mode 0