SBASAK2B march   2022  – june 2023 AFE7903

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Description (continued)
  6. 5Revision History
  7. 6Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Transmitter Electrical Characteristics
    6. 6.6  RF ADC Electrical Characteristics
    7. 6.7  PLL/VCO/Clock Electrical Characteristics
    8. 6.8  Digital Electrical Characteristics
    9. 6.9  Power Supply Electrical Characteristics
    10. 6.10 Timing Requirements
    11. 6.11 Switching Characteristics
    12. 6.12 Typical Characteristics
      1. 6.12.1  RX Typical Characteristics 30 MHz and 400 MHz
      2. 6.12.2  RX Typical Characteristics at 800 MHz
      3. 6.12.3  RX Typical Characteristics 1.75 GHz to 1.9 GHz
      4. 6.12.4  RX Typical Characteristics 2.6 GHz
      5. 6.12.5  RX Typical Characteristics 3.5 GHz
      6. 6.12.6  RX Typical Characteristics 4.9 GHz
      7. 6.12.7  RX Typical Characteristics 6.8 GHz
      8. 6.12.8  TX Typical Characteristics at 30 MHz and 600 MHz
      9. 6.12.9  TX Typical Characteristics at 800 MHz
      10. 6.12.10 TX Typical Characteristics at 1.8 GHz
      11. 6.12.11 TX Typical Characteristics at 2.6 GHz
      12. 6.12.12 TX Typical Characteristics at 3.5 GHz
      13. 6.12.13 TX Typical Characteristics at 4.9 GHz
      14. 6.12.14 TX Typical Characteristics at 7.1 GHz
      15. 6.12.15 PLL and Clock Typical Characteristics
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

TX Typical Characteristics at 3.5 GHz

Typical values at TA = +25°C with nominal supplies. Unless otherwise noted, TX input data rate = 491.52 MSPS, fDAC = 11796.48 MSPS, interleave mode, AOUT = –1 dBFS, 1st Nyquist zone output, Internal PLL, fREF = 491.52 MSPS, 24x Interpolation, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated

GUID-20211125-SS0I-QSPM-8XZT-R5Q1D9ZMDXKW-low.svg
Aout = -0.5 dFBS, 3.5 GHz Matching, included PCB and cable losses
Figure 6-444 TX Output Power vs DSA Setting at 3.5 GHz
GUID-20211125-SS0I-KNZG-LXGQ-CSWPPLZJM9S5-low.svg
3.5 GHz Matching, included PCB and cable losses
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 6-446 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-20211125-SS0I-KMGL-96W4-K6ZG1TDMBKDV-low.svg
3.5 GHz Matching, included PCB and cable losses
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 6-448 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-20211125-SS0I-CRQN-1PHB-KC2X2Q2HL9TM-low.svg
3.5 GHz Matching, included PCB and cable losses
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 6-450 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-20211125-SS0I-LZB4-QJJ9-DXV2HXMW2LQK-low.svg
3.5 GHz Matching, included PCB and cable losses
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 6-452 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-8A588E33-5844-42FC-94AC-1B9547647C5D-low.gif
3.5 GHz Matching, 1TX
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 6-454 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-DC17FDEC-0E4E-48B0-B7CE-AD44EF56B60C-low.gif
3.5 GHz Matching, 1TX
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 6-456 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-9F6A1D8A-76B9-440E-AD8C-E9705FAF40CD-low.gif
3.5 GHz Matching, 1TX
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 6-458 TX Uncalibrated Differential Phase Error vs DSA setting and Temperature at 3.5 GHz
GUID-B9272FA7-8384-4083-834C-A33A61146B8C-low.gif
3.5 GHz Matching, 1TX
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting=0)
Figure 6-460 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-20211125-SS0I-PRFQ-93LW-SV7KFHSJZZHC-low.svg
fDAC = 11796.48 MSPS, interleave mode, matching at 3.5 GHz, Aout = –13 dBFS.
Figure 6-462 TX NSD vs DSA Setting at 3.5 GHz
GUID-20211125-SS0I-VQ4C-GQCL-63W25TQLJPJ5-low.svg
fDAC = 12 MSPS, external clock mode, non-interleave mode
Figure 6-464 TX NSD vs Digital Amplitude and Channel at 3.75 GHz
GUID-20211125-SS0I-NQRV-XST5-CJXHK1X22T4H-low.svg
20-MHz tone spacing, 3.5 GHz Matching
Figure 6-466 TX IMD3 vs Digital Amplitude and Channel at 3.5 GHz
GUID-20211125-SS0I-VSRR-81DJ-1GPVJVHW0ZZ7-low.svg
50-MHz tone spacing, external clock mode, non-interleave mode
Figure 6-468 TX IMD3 vs Tone Spacing and Channel at 3.75 GHz
GUID-20210708-CA0I-BWMM-PNW1-GCWZFWSXXLP3-low.svg
50-MHz tone spacing, external clock mode, non-interleave mode
Figure 6-470 TX IMD3 vs Digital Amplitude and Dither at 3.75 GHz
GUID-6BA7898E-D76D-4BFD-8CC7-2F0709EF7CC4-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 6-472 TX 20-MHz LTE Output Spectrum at 3.5 GHz (Band 42)
GUID-FCBE5FEA-DEAA-4A4F-B61F-4B792EA23976-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 6-474 TX 2 carrier 100-MHz NR Output Spectrum at 3.45 GHz and 3.75 GHz
GUID-20211125-SS0I-X2QG-ZQTS-2QRX8CNCLCRT-low.svg
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 6-476 TX 20-MHz LTE alt-ACPR vs DSA Setting at 3.5 GHz
GUID-20211125-SS0I-CBLJ-RDRR-SVT3PC3ZLWHC-low.svg
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 6-478 TX 100-MHz NR alt-ACPR vs DSA Setting at 3.5 GHz
GUID-20211125-SS0I-HPZL-M5FG-LDNJ4DCPTQQK-low.svg
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 6-480 TX 20-MHz LTE alt-ACPR vs Digital Level at 3.5 GHz
GUID-20211125-SS0I-0G2G-DRP8-FWNBQFMRTSVD-low.svg
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 6-482 TX 100-MHz NR alt-ACPR vs Digital Level at 3.5 GHz
GUID-20211125-SS0I-DV6P-TZSK-DMDMGQBQPHR3-low.svg
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency. Dip is due to HD3 falling near DC.
Figure 6-484 TX Single Tone HD3 vs Frequency and Digital Level at 3.5 GHz
GUID-A603C7B5-F10C-4458-BEDF-784F5B5511CF-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 6-486 TX Single Tone (–1 dBFS) Output Spectrum at 3.5 GHz (±300 MHz)
GUID-022A1EB5-9F99-48DB-BDE9-7714D446194D-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 6-488 TX Single Tone (–6 dBFS) Output Spectrum at 3.5 GHz (±300 MHz)
GUID-0DEA5EF5-1386-4B4B-A15F-B4B66061E878-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 6-490 TX Single Tone (–12 dBFS) Output Spectrum at 3.5 GHz (±300 MHz)
GUID-20210708-CA0I-VT4S-CTTJ-KC2QFRDJDNQK-low.svg
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 6-492 TX Dual Tone Output Spectrum at 3.75 GHz, -7 dBFS each (±600 MHz)
GUID-20210708-CA0I-3JZC-FL9G-GJJ0TFHRCPTF-low.svg
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 6-494 TX Dual Tone Output Spectrum at 3.75 GHz, -13 dBFS each (±600 MHz)
GUID-20210708-CA0I-J92J-D9BL-8N6WBV7B6SQX-low.svg
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 6-496 TX Dual Tone Output Spectrum at 3.75 GHz, -30 dBFS each (±600 MHz)
GUID-80543382-7389-4A45-B6CE-ACB58AB8D087-low.gif
Aout = -0.5 dFBS, 3.5 GHz Matching, included PCB and cable losses
Figure 6-445 TX Output Power vs Frequency
GUID-20211125-SS0I-FDNH-40V4-T2KDMSK2GCGP-low.svg
3.5 GHz Matching, included PCB and cable losses
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 6-447 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-20211125-SS0I-BGXP-GKSQ-BK7KJPGHN3LR-low.svg
3.5 GHz Matching, included PCB and cable losses
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 6-449 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-20211125-SS0I-XCKR-PJDK-WL6XHLJ0RK3R-low.svg
3.5 GHz Matching, included PCB and cable losses
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting). Phase DNL spike may occur at any DSA setting.
Figure 6-451 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-20211125-SS0I-2RDW-4S5W-K1R6MGGGKDKD-low.svg
3.5 GHz Matching, included PCB and cable losses
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 6-453 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-2D0AEA7D-29B0-4F2B-80EB-02417D2CC315-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 6-455 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-5C7AB861-6024-445E-9A25-C17A04B4D542-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 6-457 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-0748D0BC-42C7-4C0A-A09B-6B49F595FD37-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 6-459 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-DADB0169-BA36-4F7F-B8D6-F3A4051E8B71-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 6-461 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-20211125-SS0I-VQ4C-GQCL-63W25TQLJPJ5-low.svg
fDAC = 12 MSPS, external clock mode, non-interleave mode
Figure 6-463 TX NSD vs Digital Amplitude and Temperature at 3.75 GHz
GUID-20211125-SS0I-PCWR-DSMC-6L6RRXBM59GQ-low.svg
20-MHz tone spacing, 3.5 GHz Matching, –13 dBFS each tone, included PCB and cable losses
Figure 6-465 TX IMD3 vs DSA Setting at 3.5 GHz
GUID-20210708-CA0I-J8JL-BNHP-MLCJT1B7BFHN-low.png
50-MHz tone spacing, external clock mode, non-interleave mode
Figure 6-467 TX IMD3 vs Tone Spacing and Amplitude at 3.75 GHz
GUID-20210708-CA0I-VPZG-2NZC-XJLJZRWVK4G1-low.svg
50-MHz tone spacing, external clock mode, non-interleave mode
Figure 6-469 TX IMD3 vs Digital Amplitude and Temperature at 3.75 GHz
GUID-20211125-SS0I-BCCQ-NHK1-H5QNHFR2CTJB-low.svg
Inband = 3.75 GHz ± 600 MHz, fDAC = 9 GSPS, external clock mode, non-interleave mode.
Figure 6-471 Two Tone Inband SFDR vs Digital Amplitude at 3.75 GHz
GUID-5A53ECB6-F8A6-4E9B-86A0-A6923F4D54F6-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 6-473 TX 100-MHz NR Output Spectrum at 3.5 GHz (Band 42)
GUID-20211125-SS0I-9GN0-NQKD-L4QVBBRGDNS8-low.svg
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 6-475 TX 20-MHz LTE ACPR vs DSA Setting at 3.5 GHz
GUID-20211125-SS0I-PZV2-8M2J-HRH04WM57BKH-low.svg
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 6-477 TX 100-MHz NR ACPR vs DSA Setting at 3.5 GHz
GUID-20211125-SS0I-G3FF-JRX6-VXVC37MKDLV1-low.svg
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 6-479 TX 20-MHz LTE ACPR vs Digital Level at 3.5 GHz
GUID-20211125-SS0I-LJHG-QHP4-HJS8B0L9NZTV-low.svg
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 6-481 TX 100-MHz NR ACPR vs Digital Level at 3.5 GHz
GUID-20211125-SS0I-MRRT-J1VW-PQWWJHPRRLML-low.svg
Matching at 3.5 GHz, fDAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 6-483 TX Single Tone HD2 vs Frequency and Digital Level at 3.5 GHz
GUID-9DA9D349-D1C2-4582-8FD6-D38D4615C51F-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 6-485 TX Single Tone (–1 dBFS) Output Spectrum at 3.5 GHz (0 - fDAC)
GUID-C7EFB0AA-05E2-4A3C-A1AC-965B777135B6-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 6-487 TX Single Tone (–6 dBFS) Output Spectrum at 3.5 GHz (0-fDAC)
GUID-851064B3-9AE7-4AB5-9590-2197A2CEA61C-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 6-489 TX Single Tone (–12 dBFS) Output Spectrum at 3.5 GHz (0-fDAC)
GUID-20210708-CA0I-CVPV-67XV-LDF4GWHZHJR5-low.png
Matching at 3.5 GHz, 50MHz tone spacing, fDAC = 12GSPS, non-interleave mode.
Figure 6-491 TX Dual Tone Output Spectrum at 3.75 GHz, -7 dBFS each (0 - fDAC)
GUID-20210708-CA0I-F9CC-MZD8-TDQBLTFKG652-low.svg
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 6-493 TX Dual Tone Output Spectrum at 3.75 GHz, -13 dBFS each (0 - fDAC)
GUID-20210708-CA0I-MQ05-BGXR-WL7FGZRHRQD4-low.png
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 6-495 TX Dual Tone Output Spectrum at 3.75 GHz, -30 dBFS each (0 - fDAC)
GUID-20210707-CA0I-N18S-SK65-3F3MXWH3VD6P-low.svg
fDAC = fCLK = 12 GSPS, non-interleave mode.
Figure 6-497 External Clock Additive Phase Noise at 3.7 GHz