SBAS971C December   2019  – June 2020 AFE7920 , AFE7921 , AFE7988 , AFE7989

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Functional Block Diagram
    1. 4.1 AFE7920/AFE7921 Functional Block Diagram
    2. 4.2 AFE7988/89 Functional Block Diagram
  5. 5Revision History
  6. 6Device and Documentation Support
    1. 6.1 Device Support
      1. 6.1.1 Third-Party Products Disclaimer
    2. 6.2 Related Links
    3. 6.3 Receiving Notification of Documentation Updates
    4. 6.4 Support Resources
    5. 6.5 Trademarks
    6. 6.6 Electrostatic Discharge Caution
    7. 6.7 Glossary
  7. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Quad RF sampling 12-GSPS transmit DACs
  • Quad RF sampling 3-GSPS receive ADCs
  • Dual RF sampling 3-GSPS feedback ADCs (AFE792x only)
  • Maximum RF signal bandwidth:
    • TX/FB: 1200 MHz (AFE7920/88) or 400 MHz (AFE7989) or 800MHz (AFE7921)
    • RX: 600 MHz (AFE7920/88) or 400 MHz (AFE7921/AFE7989)
  • Digital Step Attenuators (DSA):
    • TX: 40 dB range, 1-dB analog and 0.125-dB digital steps
    • RX: 25 dB range, 0.5-dB steps
    • FB: 25 dB range, 0.5-dB steps
  • Single or dual-band DUC/DDCs (AFE7920/88 only) for TX and RX
  • Dual NCOs for fast frequency switching
  • Supports TDD operation with fast switching between TX and RX
  • Internal PLL/VCO to generate DAC/ADC clocks
  • Optional external CLK at DAC or ADC rate
  • SerDes data interface:
    • JESD204B and JESD204C compliant
    • 8 SerDes transceivers up to 29.5 Gbps
    • 8b/10b and 64b/66b encoding
    • 12-bit, 16-bit, 24-bit, and 32-bit resolution
    • Subclass 1 multi-device synchronization
  • Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch