Four-transmit four-receive RF-sampling transceiver with dual-band DUC/DDC and two feedback paths


Product details


# of TX/RX 4T/4R/2F # of DUCs/TX 2 # of DDCs/RX 2 Data rate (MSPS) 1474.56 Operating temperature range (C) -40 to 85 Applications Wireless infrastructure open-in-new Find other RF-sampling transceivers

Package | Pins | Size

FCBGA (ABJ) 400 289 mm² 17 x 17 open-in-new Find other RF-sampling transceivers


  • Quad RF sampling 12-GSPS transmit DACs
  • Quad RF sampling 3-GSPS receive ADCs
  • Dual RF sampling 3-GSPS feedback ADCs (AFE792x only)
  • Maximum RF signal bandwidth:
    • TX/FB: 1200 MHz (AFE7920/88) or 400 MHz (AFE7989) or 800MHz (AFE7921)
    • RX: 600 MHz (AFE7920/88) or 400 MHz (AFE7921/AFE7989)
  • Digital Step Attenuators (DSA):
    • TX: 40 dB range, 1-dB analog and 0.125-dB digital steps
    • RX: 25 dB range, 0.5-dB steps
    • FB: 25 dB range, 0.5-dB steps
  • Single or dual-band DUC/DDCs (AFE7920/88 only) for TX and RX
  • Dual NCOs for fast frequency switching
  • Supports TDD operation with fast switching between TX and RX
  • Internal PLL/VCO to generate DAC/ADC clocks
  • Optional external CLK at DAC or ADC rate
  • SerDes data interface:
    • JESD204B and JESD204C compliant
    • 8 SerDes transceivers up to 29.5 Gbps
    • 8b/10b and 64b/66b encoding
    • 12-bit, 16-bit, 24-bit, and 32-bit resolution
    • Subclass 1 multi-device synchronization
  • Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch
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The AFE79xx is a family of high performance, wide bandwidth multi-channel transceivers, integrating four RF sampling transmitter chains, four RF sampling receiver chains, and up to two RF sampling digitizing auxiliary chains (feedback paths). The high dynamic range of the transmitter and receiver chains allows the device to generate and receive 3G, 4G, and 5G signals from wireless base stations, while the wide bandwidth capability of the AFE79xx devices is designed for multi-band 4G and 5G base stations.

Each receiver chain includes a 25-dB range DSA (Digital Step Attenuator), followed by a 3-GSPS ADC (analog-to-digital converter). Each receiver channel has an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. The single or dual digital down converters (DDC) provide up to 600 MHz of combined signal BW. In TDD mode, the receiver channel can be configured to dynamically switch between the traffic receiver (TDD RX) and wideband feedback receiver (TDD FB), with the capability of re-using the same analog input for both purposes.

Each transmitter chain includes a single or dual digital up converters (DUCs) supporting up to 1200-MHz combined signal bandwidth. The output of the DUCs drives a 12-GSPS DAC (digital to analog converter) with a mixed mode output option to enhance 2nd or 3rd Nyquist operation. The DAC output includes a variable gain amplifier (TX DSA) with 40-dB range and 1-dB analog and 0.125-dB digital steps.

The feedback path includes an 25-dB range DSA driving a 3-GSPS RF sampling ADC, followed by a DDC with up to 1200-MHz bandwidth.

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Request more information

See the full data sheet and other design resources for the commercial wireless-specific AFE7920. Request now

For all other applications, see our general-purpose RF-sampling AFEs.

Technical documentation

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Type Title Date
* Data sheet AFE79xx Quad-Channel RF Transceiver With Feedback Path datasheet (Rev. C) Jun. 23, 2020
Application note AFE79xx Layout Guide (Rev. B) Apr. 06, 2021
Application note System Design Considerations when Upgrading from JESD204B to JESD204C (Rev. A) Apr. 05, 2021
Application note 基于AFE79xx的JESD204C 应用简述 Apr. 01, 2021
Application note Powering the AFE7920 with the TPS62913 Low-Ripple and Low-Noise Buck Converter Mar. 05, 2021
Technical article Minimize noise and ripple with a low-noise buck converter Oct. 21, 2020
User guide AFE79xx, LMH9xx EVM User Guide Jul. 23, 2020
Application note How to Achieve Frequency Hopping with the AFE79xx Jul. 02, 2020
Application note AFE76xx, AFE77xx, and AFE79xx JESD204 Layer Testing Apr. 15, 2020
Technical article So, what's a VNA anyway? Aug. 23, 2019
Technical article So, what's the deal with frequency response? Aug. 23, 2019
Application note Temp Profile to Maintain Optimum FIT Performance Jul. 23, 2019
Technical article So, what are S-parameters anyway? May 23, 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
The AFE79-LMH9-EVM evaluation module (EVM) is a board for evaluating the performance of the AFE79xx family of integrated RF sampling transceivers interfaced with the LMH9xxx family of active baluns. The AFE79-LMH9-EVM showcases the AFE7920, LMH9126, LMH9226, LMH9135, and LMH9235. The device is well (...)
  • Operates on single +3.3-V supply
  • Designed for differential 100-Ω input matching and single-ended 50-Ω output matching interface
  • Simple interface to the inputs and output through on-board SMA connectors
  • Power down option available on board using jumper connector
document-generic User guide

The AFE7920 evaluation module (EVM) is an RF-sampling transceiver platform that can be configured to support up to four-transmit, four-receive plus two-feedback (4T4R + 2FB) channels simultaneously.

The board evaluates the AFE7920 device, which is a quad-channel RF-sampling analog front end (AFE (...)

  • Allows evaluation of 4T4R + 2FB RF-sampling AFE7920 solutions
  • JESD204B/C data interface to simplify digital interface; compliant up to 29.5-Gbps lane rates
  • Supports JESD204B/C for synchronization and compatibility
  • Option for DC-DC-based LDO-less power-management solution
  • Onboard clocking solution (...)

Software development

JESD204 Rapid Design IP for FPGAs connected to TI high-speed data converters
TI-JESD204-IP The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
  • Compatible with JEDEC JESD204a/b/c protocols
  • Supports subclass 1 deterministic latency and multidevice synchronization
  • Supported lane rates
    • Up to 16.375 Gbps in 8b/10b mode
    • Up to 20 Gbps in 64b/66b mode
  • Supports all protocol related error detection and reporting features
  • Integrated transport layer (...)

CAD/CAE symbols

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FCBGA (ABJ) 400 View options

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