Refer to the PDF data sheet for device specific package drawings
Skew within the CK and ADDR_CTRL net classes directly reduces setup and hold margin and, thus, this skew must be controlled. The only way to practically match lengths on a PCB is to lengthen the shorter traces up to the length of the longest net in the net class and its associated clock. A metric to establish this maximum length is Manhattan distance. The Manhattan distance between two points on a PCB is the length between the points when connecting them only with horizontal or vertical segments. A reasonable trace route length is to within a percentage of its Manhattan distance. CACLM is defined as Clock Address Control Longest Manhattan distance.
Given the clock and address pin locations on the device and the DDR3 memories, the maximum possible Manhattan distance can be determined given the placement. Figure 5-76 shows this distance for two loads. It is from this distance that the specifications on the lengths of the transmission lines for the address bus are determined. CACLM is determined similarly for other address bus configurations; that is, it is based on the longest net of the CK and ADDR_CTRL net class. For CK and ADDR_CTRL routing, these specifications are contained in Table 5-58.
|10||AS+ and AS- length||70||mils|
|11||AS+ and AS- skew||5||mils|
|15||CK and ADDR_CTRL nominal trace length(9)||CACLM-50||CACLM||CACLM+50||mils|
|16||Center-to-center CK to other DDR3 trace spacing(10)||4||w|
|17||Center-to-center ADDR_CTRL to other DDR3 trace spacing(10)(11)||4||w|
|18||Center-to-center ADDR_CTRL to other ADDR_CTRL trace spacing(10)||3||w|
|19||CK center-to-center spacing(12)|
|20||CK spacing to other net(10)||4||w|