In the case of a missing high-side supply voltage AVDD, the output of the ΔΣ modulator is not defined and can cause a system malfunction. In systems with high safety requirements, this behavior is not acceptable. Therefore, as shown in Figure 2, the AMC1303 implements a fail-safe output function that pulls the DOUT and CLKOUT outputs (AMC1303Mx only) to a steady-state logic 1 in case of a missing AVDD.
Similarly, as also shown in Figure 48, if the common-mode voltage of the input reaches or exceeds the specified common-mode overvoltage detection level VCMov as defined in the Electrical Characteristics table, the AMC1303 generates a steady-state bitstream of logic 1's at the DOUT output.
In both cases, the steady-state logic 1 occurs on the DOUT output with a delay of two clock cycles after the event of either exceeded common-mode input voltage or missing AVDD. Another 256 clock cycles are required for the CLKOUT pin of the AMC1303Mx to be held at logic 1.