SBASAD0A March   2022  – July 2022 AMC23C10

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information 
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications 
    8. 6.8  Safety Limiting Values 
    9. 6.9  Electrical Characteristics 
    10. 6.10 Switching Characteristics 
    11. 6.11 Timing Diagrams
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Digital Outputs
      4. 7.3.4 Power-Up and Power-Down Behavior
      5. 7.3.5 VDD1 Brownout and Power-Loss Behavior
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Voltage Zero-Crossing Detection
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.3 Detailed Design Procedure

The value of the shunt resistor R5 is determined by the maximum peak input voltage of 230 VRMS × 1.1 × √2 = 360 VPK and the maximum allowed current of 150 μA. R5 is therefore calculated as 360 VPK / 150 μA = 2.4 MΩ. R5 must be divided into a minimum of five unit resistors of 480 kΩ each to limit the maximum voltage drop per resistor to the allowed 75 V. The closest value from the E96 series is 487 kΩ and, therefore, the total R5 value is 5 × 487 kΩ = 2.43 MΩ.

The two diodes D1 and D2 have a forward-bias voltage from 200 mV to 500 mV at 150-μA forward current, depending on temperature, and therefore satisfy both the minimum required voltage swing and the maximum allowed input voltage at the INP pin.

The reverse-bias capacitance of D1 and D3 of 3 pF (maximum) together with R5 form an input filter with a corner frequency of less than 22.1 kHz or a delay time of approximately 7.2 μs (maximum). The corner frequency of the low-pass filter can be adjusted down by inserting a small-value capacitor (C6). A larger filter capacitance is preferable to increase noise immunity if the system can tolerate the additional delay. The total delay time of the zero-crossing detection is 7.2 μs from the input filter plus the propagation delay of the comparator of 320 ns (maximum). The slew rate of the AC line voltage during the zero crossing is 360 VPK × 2 × π × 50 Hz = 113 mV/μs. The effective zero-crossing threshold therefore is 113 mV/μs × (7.2 μs + 320 ns) = 850 mV.

Table 8-2 summarizes the key parameters of the design.

Table 8-2 Zero-Crossing Detection Design Example
PARAMETER VALUE
Shunt resistor value R5 2.43 MΩ (5 × 487 kΩ)
Maximum current through R5 148 μA
Effective switching threshold ±850 mV
Propagation delay <8 μs