SLUS805C April   2008  – August 2015

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Overvoltage Protection
      2. 7.3.2 Battery Overvoltage Protection
      3. 7.3.3 Thermal Protection
      4. 7.3.4 Start-Up Short-Circuit Protection
      5. 7.3.5 Enable Function
      6. 7.3.6 Fault Indication
    4. 7.4 Device Functional Modes
      1. 7.4.1 OPERATION Mode
      2. 7.4.2 POWER-DOWN Mode
      3. 7.4.3 POWER-ON RESET Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Selection of R(BAT)
        2. 8.2.2.2 Selection of R(CE)
        3. 8.2.2.3 Selection of Input and Output Bypass Capacitors
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The bq2438x device protects against overvoltage and battery overvoltage events that occur due to faulty adapter or incorrect input sources. If either of these faults occur, the bq2438x device isolates the downstream devices from the input source and alerts the host controller with the FAULT open-drain output.

8.2 Typical Application

bq24380 bq24381 bq24382 typ_app_cir_lus805.gifFigure 10. Typical Application Circuit

8.2.1 Design Requirements

For this design example, use the parameters shown in Table 1.

Table 1. Design Parameters

PARAMETER VALUE
Voltage 5 V
Current < 1.5 A

8.2.2 Detailed Design Procedure

8.2.2.1 Selection of R(BAT)

It is strongly recommended that the battery not be tied directly to the VBAT pin of the device, as under some failure modes of the device, the voltage at the IN pin may appear on the VBAT pin. This voltage can be as high as 30 V, and applying 30 V to the battery may cause failure of the device and can be hazardous. Connecting the VBAT pin through R(BAT) prevents a large current from flowing into the battery in the event of failure of the device. For safety, R(BAT) must have a high value. The problem with a large R(BAT) is that the voltage drop across this resistor because of the VBAT bias current, I(VBAT), causes an error in the BVOVP threshold. This error is over and above the tolerance on the nominal 4.35-V BVOVP threshold.

Choosing R(BAT) in the range from 100 kΩ to 470 kΩ is a good compromise. If the device fails with R(BAT) equal to 100 kΩ, the maximum current flowing into the battery would be (30 V – 3 V) ÷ 100 kΩ = 246 μA, which is low enough to be absorbed by the bias currents of the system components. R(BAT) equal to 100 kΩ results in a worst-case voltage drop of R(BAT) × I(VBAT) = 1 mV. This is negligible compared to the internal tolerance of 50 mV on the BVOVP threshold.

If the Bat-OVP function is not required, the VBAT pin must be connected to VSS.

8.2.2.2 Selection of R(CE)

The CE pin can be used to enable and disable the device. If host control is not required, the CE pin can be tied to ground or left unconnected, permanently enabling the device.

In applications where external control is required, the CE pin can be controlled by a host processor. As with the VBAT pin (see previous discussion), the CE pin must be connected to the host GPIO pin through as large a resistor as possible. The limitation on the resistor value is that the minimum VOH of the host GPIO pin less the drop across the resistor must be greater than VIH of the bq2438x CE pin. The drop across the resistor is given by R(CE) × IIH.

8.2.2.3 Selection of Input and Output Bypass Capacitors

The input capacitor CIN in Figure 10 is for decoupling and serves an important purpose. Whenever there is a step change downwards in the system load current, the inductance of the input cable causes the input voltage to spike up. CIN prevents the input voltage from overshooting to dangerous levels. It is recommended that a ceramic capacitor of at least 1 μF be used at the input of the device. It must be located in close proximity to the IN pin.

COUT in Figure 10 is also important. During an overvoltage transient, this capacitance limits the output overshoot until the power FET is turned off by the overvoltage protection circuitry. COUT must be a ceramic capacitor of at least 1 μF, located close to the OUT pin. COUT also serves as the input decoupling capacitor for the charging circuit downstream of the protection device.

8.2.3 Application Curves

bq24380 bq24381 bq24382 soft_start_lus805.gifFigure 11. Normal Power-On vs Showing Soft-Start (bq24380)
bq24380 bq24381 bq24382 ip_step_lus805.gifFigure 13. OVP Response for Input Step (bq24380)
bq24380 bq24381 bq24382 recovery_lus805.gifFigure 15. Recovery from OVP (bq24380)
bq24380 bq24381 bq24382 soft_stop_lus805.gifFigure 17. Soft-Stop During OCP Event (bq24380)
bq24380 bq24381 bq24382 power_on_lus805.gifFigure 12. OVP at Power-On
bq24380 bq24381 bq24382 slow_ip_lus805.gifFigure 14. Slow Input Ramp into OVP Event (bq24380)
bq24380 bq24381 bq24382 power_up_lus805.gifFigure 16. Power Up into Short Circuit
bq24380 bq24381 bq24382 ovp_bat_lus805.gifFigure 18. Battery OVP Event (bq24380)