SLUSBJ3F August   2013  – March 2019

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Charger Efficiency
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Maximum Power Point Tracking
      2. 7.3.2 Battery Undervoltage Protection
      3. 7.3.3 Battery Overvoltage Protection
      4. 7.3.4 Battery Voltage in Operating Range (VBAT_OK Output)
      5. 7.3.5 Push-Pull Multiplexer Drivers
      6. 7.3.6 Nano-Power Management and Efficiency
    4. 7.4 Device Functional Modes
      1. 7.4.1 Main Boost Charger Disabled (Ship Mode) - (VSTOR > VSTOR_CHGEN and EN = HIGH)
      2. 7.4.2 Cold-Start Operation (VSTOR < VSTOR_CHGEN, VIN_DC > VIN(CS) and PIN > PIN(CS))
      3. 7.4.3 Main Boost Charger Enabled (VSTOR > VSTOR_CHGEN, VIN_DC > VIN(DC) and EN = LOW )
      4. 7.4.4 Thermal Shutdown
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Energy Harvester Selection
      2. 8.1.2 Storage Element Selection
      3. 8.1.3 Inductor Selection
      4. 8.1.4 Capacitor Selection
        1. 8.1.4.1 VREF_SAMP Capacitance
        2. 8.1.4.2 VIN_DC Capacitance
        3. 8.1.4.3 VSTOR Capacitance
        4. 8.1.4.4 Additional Capacitance on VSTOR or VBAT_SEC
    2. 8.2 Typical Applications
      1. 8.2.1 Solar Application Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Performance Plots
      2. 8.2.2 TEG Application Circuit
      3. 8.2.3 Design Requirements
        1. 8.2.3.1 Detailed Design Procedure
        2. 8.2.3.2 Application Performance Plots
      4. 8.2.4 Piezoelectric Application Circuit
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Zip Files
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

The recommended L1 = 22 µH, CBYP = 0.01 µF and low leakage CREF = 10 nF are selected. The rectifier diodes are Panasonic DB3X316F0L. In order to ensure the fastest recovery of the harvester output voltage to the MPPT level following power extraction, the minimum recommended CIN = 4.7 µF is selected. Because no large system load transients are expected and to ensure fast charge time during cold start, the minimum recommended CSTOR = 4.7 µF.

  • Keeping in mind that VREF_SAMP stores the MPP voltage for the harvester, first choose RSUMOC = ROC1 + ROC2 = 20 MΩ then solve Equation 1 for
  • Equation 14. bq25505 Eq14_ROC1_slusbj3.gif
  • ROC2 = RSUMOC x (1 - VREF_SAMP / VIN_DC(OC) = 20 MΩ x (1 - 0.4 V / 1 V ) = 12 MΩ → series 10 MΩ and
    2 MΩ easy to obtain 1% resistors.
  • Referring back to the procedure in Typical Applications or using the spreadsheet calculator at SLUC484 gives the following values
    • ROV1 = 7.15 MΩ, ROV2 = 5.90 MΩ resulting in VBAT_OV = 3.31V due to rounding to the nearest 1% resistor.
  • ROK1 = 4.99 MΩ, ROK2 = 6.65 MΩ, ROK3 = 1.24 MΩ resulting in VBAT_OK = 2.82 V and VBAT_OK_HYST =
    3.12 V after rounding to the nearest 1% resistor value.