SLUSG44A June   2025  – October 2025 BQ25822

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Device Power-On-Reset
      2. 6.3.2  Device Power-Up From Battery Without Input Source
      3. 6.3.3  Device Power Up From Input Source
        1. 6.3.3.1 VAC Operating Window Programming (ACUV and ACOV)
        2. 6.3.3.2 MODE Pin Configuration
        3. 6.3.3.3 REGN Regulator (REGN LDO)
        4. 6.3.3.4 Switching Frequency and Synchronization (FSW_SYNC)
        5. 6.3.3.5 Device HIZ Mode
      4. 6.3.4  Battery Charging Management
        1. 6.3.4.1 Autonomous Charging Cycle
          1. 6.3.4.1.1 Charge Current Programming (ICHG pin and ICHG_REG)
        2. 6.3.4.2 Li-Ion Battery Charging Profile
        3. 6.3.4.3 LiFePO4 Battery Charging Profile
        4. 6.3.4.4 Charging Termination for Li-ion and LiFePO4
        5. 6.3.4.5 Charging Safety Timer
        6. 6.3.4.6 Thermistor Qualification
          1. 6.3.4.6.1 JEITA Guideline Compliance in Charge Mode
          2. 6.3.4.6.2 Cold/Hot Temperature Window in Reverse Mode
      5. 6.3.5  Power Management
        1. 6.3.5.1 Dynamic Power Management: Input Voltage and Input Current Regulation
          1. 6.3.5.1.1 Input Current Regulation
            1. 6.3.5.1.1.1 ILIM_HIZ Pin
          2. 6.3.5.1.2 Input Voltage Regulation
      6. 6.3.6  Switching Frequency Dithering Feature
      7. 6.3.7  Reverse Mode Power Direction
        1. 6.3.7.1 Auto Reverse Mode
      8. 6.3.8  Integrated 16-Bit ADC for Monitoring
      9. 6.3.9  Status Outputs (PG, STAT1, STAT2, and INT)
        1. 6.3.9.1 Power Good Indicator (PG)
        2. 6.3.9.2 Charging Status Indicator (STAT1, STAT2 Pins)
        3. 6.3.9.3 Interrupt to Host (INT)
      10. 6.3.10 Protections
        1. 6.3.10.1 Voltage and Current Monitoring
          1. 6.3.10.1.1 VAC Over-voltage Protection (VAC_OVP)
          2. 6.3.10.1.2 VAC Under-voltage Protection (VAC_UVP)
          3. 6.3.10.1.3 Battery Over-voltage Protection (BAT_OVP)
          4. 6.3.10.1.4 Battery Over-current Protection (BAT_OCP)
          5. 6.3.10.1.5 Reverse Mode Over-voltage Protection (REV_OVP)
          6. 6.3.10.1.6 Reverse Mode Under-voltage Protection (REV_UVP)
          7. 6.3.10.1.7 DRV_SUP Under-voltage and Over-voltage Protection (DRV_OKZ)
          8. 6.3.10.1.8 REGN Under-voltage Protection (REGN_OKZ)
        2. 6.3.10.2 Thermal Shutdown (TSHUT)
      11. 6.3.11 Serial Interface
        1. 6.3.11.1 Data Validity
        2. 6.3.11.2 START and STOP Conditions
        3. 6.3.11.3 Byte Format
        4. 6.3.11.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 6.3.11.5 Target Address and Data Direction Bit
        6. 6.3.11.6 Single Write and Read
        7. 6.3.11.7 Multi-Write and Multi-Read
    4. 6.4 Device Functional Modes
      1. 6.4.1 Host Mode and Default Mode
      2. 6.4.2 Register Bit Reset
    5. 6.5 BQ25822 Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Application (High Power Supercapacitor Backup)
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 ACUV / ACOV Input Voltage Operating Window Programming
          2. 7.2.1.2.2 Charge Voltage Selection
          3. 7.2.1.2.3 Switching Frequency Selection
          4. 7.2.1.2.4 Inductor Selection
          5. 7.2.1.2.5 Input (VAC) Capacitor
          6. 7.2.1.2.6 Output (VBAT) Capacitor
          7. 7.2.1.2.7 Sense Resistor (RAC_SNS and RBAT_SNS) and Current Programming
          8. 7.2.1.2.8 Power MOSFETs Selection
          9. 7.2.1.2.9 Converter Fast Transient Response
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RRV|36
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.3 Device Power Up From Input Source

When a valid input source (VVAC_OK < VAC and VAC within the ACUV and ACOV operating window) is detected, the PG pin pulls LOW. If charging is enabled, the device proceeds to enable the REGN LDO and power up the buck converter.