SLUSCC5A September   2016  – May 2018 BQ25890H

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Simplified Schematic
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Feature Description
      1. 8.2.1  Device Power-On-Reset (POR)
      2. 8.2.2  Device Power Up from Battery without Input Source
      3. 8.2.3  Device Power Up from Input Source
        1. 8.2.3.1 Power Up REGN Regulation (LDO)
        2. 8.2.3.2 Poor Source Qualification
        3. 8.2.3.3 Input Source Type Detection
          1. 8.2.3.3.1 D+/D– Detection Sets Input Current Limit
          2. 8.2.3.3.2 Force Input Current Limit Detection
        4. 8.2.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 8.2.3.5 Converter Power-Up
      4. 8.2.4  Input Current Optimizer (ICO)
      5. 8.2.5  Boost Mode Operation from Battery
      6. 8.2.6  Power Path Management
        1. 8.2.6.1 Narrow VDC Architecture
        2. 8.2.6.2 Dynamic Power Management
        3. 8.2.6.3 Supplement Mode
      7. 8.2.7  Battery Charging Management
        1. 8.2.7.1 Autonomous Charging Cycle
        2. 8.2.7.2 Battery Charging Profile
        3. 8.2.7.3 Charging Termination
        4. 8.2.7.4 Resistance Compensation (IRCOMP)
        5. 8.2.7.5 Thermistor Qualification
          1. 8.2.7.5.1 JEITA Guideline Compliance in Charge Mode
          2. 8.2.7.5.2 Cold/Hot Temperature Window in Boost Mode
        6. 8.2.7.6 Charging Safety Timer
      8. 8.2.8  Battery Monitor
      9. 8.2.9  Status/Control Outputs (STAT, INT and DSEL)
        1. 8.2.9.1 Charging Status Indicator (STAT)
        2. 8.2.9.2 Interrupt to Host (INT)
        3. 8.2.9.3 D+/D- Multiplexer Selection Control
      10. 8.2.10 BATET (Q4) Control
        1. 8.2.10.1 BATFET Disable Mode (Shipping Mode)
        2. 8.2.10.2 BATFET Enable (Exit Shipping Mode)
        3. 8.2.10.3 BATFET Full System Reset
      11. 8.2.11 Current Pulse Control Protocol
      12. 8.2.12 D+/D- Output Driver
      13. 8.2.13 Input Current Limit on ILIM
      14. 8.2.14 Thermal Regulation and Thermal Shutdown
        1. 8.2.14.1 Thermal Protection in Buck Mode
        2. 8.2.14.2 Thermal Protection in Boost Mode
      15. 8.2.15 Voltage and Current Monitoring in Buck and Boost Mode
        1. 8.2.15.1 Voltage and Current Monitoring in Buck Mode
          1. 8.2.15.1.1 Input Overvoltage (ACOV)
          2. 8.2.15.1.2 System Overvoltage Protection (SYSOVP)
        2. 8.2.15.2 Voltage and Current Monitoring in Boost Mode
          1. 8.2.15.2.1 VBUS Overcurrent Protection
          2. 8.2.15.2.2 Boost Mode Overvoltage Protection
      16. 8.2.16 Battery Protection
        1. 8.2.16.1 Battery Overvoltage Protection (BATOVP)
        2. 8.2.16.2 Battery Over-Discharge Protection
        3. 8.2.16.3 System Overcurrent Protection
      17. 8.2.17 Serial Interface
        1. 8.2.17.1 Data Validity
        2. 8.2.17.2 START and STOP Conditions
        3. 8.2.17.3 Byte Format
        4. 8.2.17.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.2.17.5 Slave Address and Data Direction Bit
        6. 8.2.17.6 Single Read and Write
        7. 8.2.17.7 Multi-Read and Multi-Write
    3. 8.3 Device Functional Modes
      1. 8.3.1 Host Mode and Default Mode
    4. 8.4 Register Maps
      1. 8.4.1  REG00
        1. Table 8. REG00
      2. 8.4.2  REG01
        1. Table 9. REG01
      3. 8.4.3  REG02
        1. Table 10. REG02
      4. 8.4.4  REG03
        1. Table 11. REG03
      5. 8.4.5  REG04
        1. Table 12. REG04
      6. 8.4.6  REG05
        1. Table 13. REG05
      7. 8.4.7  REG06
        1. Table 14. REG06
      8. 8.4.8  REG07
        1. Table 15. REG07
      9. 8.4.9  REG08
        1. Table 16. REG08
      10. 8.4.10 REG09
        1. Table 17. REG09
      11. 8.4.11 REG0A
        1. Table 18. REG0A
      12. 8.4.12 REG0B
        1. Table 19. REG0B
      13. 8.4.13 REG0C
        1. Table 20. REG0C
      14. 8.4.14 REG0D
        1. Table 21. REG0D
      15. 8.4.15 REG0E
        1. Table 22. REG0E
      16. 8.4.16 REG0F
        1. Table 23. REG0F
      17. 8.4.17 REG10
        1. Table 24. REG10
      18. 8.4.18 REG11
        1. Table 25. REG11
      19. 8.4.19 REG12
        1. Table 26. REG12
      20. 8.4.20 REG13
        1. Table 27. REG13
      21. 8.4.21 REG14
        1. Table 28. REG14
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Buck Input Capacitor
        3. 9.2.2.3 System Output Capacitor
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Input Current Limit on ILIM

For safe operation, the device has an additional hardware pin on ILIM to limit maximum input current on ILIM pin. The input maximum current is set by a resistor from ILIM pin to ground as:

Equation 3. BQ25890H eq_ILIM_slusbu7.gif

The actual input current limit is the lower value between ILIM setting and register setting (IINLIM). For example, if the register setting is 111111 for 3.25 A, and ILIM has a 260-Ω resistor (KILIM = 390 max.) to ground for 1.5 A, the input current limit is 1.5 A. ILIM pin can be used to set the input current limit rather than the register settings when EN_ILIM bit is set. The device regulates ILIM pin at 0.8 V. If ILIM voltage exceeds 0.8 V, the device enters input current regulation (Refer to Dynamic Power Management section).

The ILIM pin can also be used to monitor input current when EN_ILIM is enabled. The voltage on ILIM pin is proportional to the input current. ILIM pin can be used to monitor the input current following Equation 4:

Equation 4. BQ25890H eq2_IN_slusbu7.gif

For example, if ILIM pin is set with 260-Ω resistor, and the ILIM voltage is 0.4 V, the actual input current 0.615 A - 0.75 A (based on KILM specified). If ILIM pin is open, the input current is limited to zero since ILIM voltage floats above 0.8 V. If ILIM pin is short, the input current limit is set by the register.

The ILIM pin function can be disabled by setting EN_ILIM bit to 0. When the pin is disabled, both input current limit function and monitoring function are not available.