SLUSBX7C September   2014  – March 2017

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Dynamic Rectifier Control
      2. 8.3.2  Dynamic Power Scaling
      3. 8.3.3  VO_REG Calculations
      4. 8.3.4  RILIM Calculations
      5. 8.3.5  Adapter Enable Functionality
      6. 8.3.6  Turning Off the Transmitter
        1. 8.3.6.1 WPC v1.2 EPT
      7. 8.3.7  Communication Current Limit
      8. 8.3.8  PD_DET and TMEM
      9. 8.3.9  TS/CTRL
      10. 8.3.10 PMODE Pin
      11. 8.3.11 I2C Communication
      12. 8.3.12 Input Overvoltage
      13. 8.3.13 Alignment Aid Using Frequency Information
    4. 8.4 Device Functional Modes
    5. 8.5 Register Maps
      1. 8.5.1  Wireless Power Supply Current Register 1
      2. 8.5.2  Wireless Power Supply Current Register 2
      3. 8.5.3  Wireless Power Supply Current Register 3
      4. 8.5.4  I2C Mailbox Register
      5. 8.5.5  I2C Mailbox Register 2
      6. 8.5.6  I2C Mailbox Register 3
      7. 8.5.7  Wireless Power Supply FOD RAM
      8. 8.5.8  Wireless Power User Header RAM
      9. 8.5.9  Wireless Power USER VRECT Status RAM
      10. 8.5.10 Wireless Power VOUT Status RAM
      11. 8.5.11 Wireless Power Proprietary Mode REC PWR MSByte Status RAM
      12. 8.5.12 Wireless Power REC PWR LSByte Status RAM
      13. 8.5.13 Wireless Power Prop Packet Payload RAM Byte 0
      14. 8.5.14 Wireless Power Prop Packet Payload RAM Byte 1
      15. 8.5.15 Wireless Power Prop Packet Payload RAM Byte 2
      16. 8.5.16 Wireless Power Prop Packet Payload RAM Byte 3
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 WPC v1.2 Power Supply 7-V Output With 1.4-A Maximum Current With I2C
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Output Voltage Set Point
          2. 9.2.1.2.2 Output and Rectifier Capacitors
          3. 9.2.1.2.3 TMEM
          4. 9.2.1.2.4 Maximum Output Current Set Point
          5. 9.2.1.2.5 I2C
          6. 9.2.1.2.6 Communication Current Limit
          7. 9.2.1.2.7 Receiver Coil
          8. 9.2.1.2.8 Series and Parallel Resonant Capacitors
          9. 9.2.1.2.9 Communication, Boot, and Clamp Capacitors
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Standalone 10-V WPC v1.2 Power Supply With 1-A Maximum Output Current in System Board
      3. 9.2.3 Standalone 10-V Power Supply With 1-A Maximum Output Current for 2S Charging System
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
          1. 9.2.3.2.1  Output Voltage Set Point
          2. 9.2.3.2.2  Output and Rectifier Capacitors
          3. 9.2.3.2.3  TMEM
          4. 9.2.3.2.4  Maximum Output Current Set Point
          5. 9.2.3.2.5  I2C
          6. 9.2.3.2.6  Communication Current Limit
          7. 9.2.3.2.7  Receiver Coil
          8. 9.2.3.2.8  Series Resonant Capacitors
            1. 9.2.3.2.8.1 Tuning Procedure
          9. 9.2.3.2.9  Communication, Boot, and Clamp Capacitors
          10. 9.2.3.2.10 VRECT Clamp
        3. 9.2.3.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted)(1) (2)
MIN MAX UNIT
Input voltage AC1, AC2 –0.8 20 V
RECT, COMM1, COMM2, OUT, CLAMP1, CLAMP2, WPG, PD_DET –0.3 20
AD, AD-EN –0.3 30
BOOT1, BOOT2 –0.3 20
SCL, SDA, PMODE, CM_ILIM, FOD, TS/CTRL, ILIM, TMEM, VIREG, VO_REG –0.3 7
Input current AC1, AC2 (RMS) 2.5 A
Output current OUT 2.5 A
Output sink current WPG, PD_DET 15 mA
Output sink current COMM1, COMM2 1 A
TJ Junction temperature –40 150 °C
Tstg Storage temperature –65 150 °C
(1) All voltages are with respect to the PGND pin, unless otherwise noted.
(2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM) 100 pF, 1.5 kΩ(1) ±2000 V
Charged device model (CDM)(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VRECT RECT voltage 4 11 V
IOUT Output current 2.0 A
IAD-EN Sink current 1 mA
ICOMM COMMx sink current 500 mA
TJ Junction temperature 0 125 ºC

7.4 Thermal Information

THERMAL METRIC(1) bq51025 UNIT
YFP (DSBGA)
42 PINS
RθJA Junction-to-ambient thermal resistance 49.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.2 °C/W
RθJB Junction-to-board thermal resistance 6.1 °C/W
ψJT Junction-to-top characterization parameter 1.4 °C/W
ψJB Junction-to-board characterization parameter 6.0 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted) , ILOAD = IOUT
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VUVLO Undervoltage lockout VRECT: 0 to 3 V 2.8 2.9 V
VHYS-UVLO Hysteresis on UVLO VRECT: 3 to 2 V 393 mV
VRECT-OVP Input overvoltage threshold VRECT: 5 to 16 V 14.6 15.1 15.6 V
VHYS-OVP Hysteresis on OVP VRECT: 16 to 5 V 1.5 V
VRECT(REG) Voltage at RECT pin set by communication with primary VOUT + 0.120 Lower of VOUT + 0.2 or 11.0 V
VRECT(TRACK) VRECT regulation above VOUT VILIM = 1.2 V 140 mV
ILOAD-HYS ILOAD hysteresis for dynamic VRECT thresholds as a % of IILIM ILOAD falling 4%
VRECT-DPM Rectifier undervoltage protection, restricts IOUT at VRECT-DPM 3 3.1 3.2 V
VRECT-REV Rectifier reverse voltage protection with a supply at the output VRECT-REV = VOUT – VRECT,
VOUT = 10 V		 8.8 9.2 V
QUIESCENT CURRENT
IOUT(standby) Quiescent current at the output when wireless power is disabled VOUT ≤ 5 V, 0°C ≤ TJ ≤ 85°C 20 35 µA
ILIM SHORT CIRCUIT
RILIM-SHORT Highest value of RILIM resistor considered a fault (short). Monitored for IOUT > 100 mA RILIM: 200 to 50 Ω. IOUT latches off, cycle power to reset 215 230 Ω
tDGL-Short Deglitch time transition from ILIM short to IOUT disable 1 ms
ILIM_SC ILIM-SHORT,OK enables the ILIM short comparator when IOUT is greater than this value ILOAD: 0 to 200 mA 110 125 140 mA
ILIM-SHORT,OK HYSTERESIS Hysteresis for ILIM-SHORT,OK comparator ILOAD: 200 to 0 mA 20 mA
IOUT-CL Maximum output current limit Maximum ILOAD that can be delivered for 1 ms when ILIM is shorted 3.7 A
OUTPUT
VO_REG Feedback voltage set point ILOAD = 2000 mA, VO_REG resistor divider ratio = 9:1 0.4968 0.5019 0.5077 V
ILOAD = 1 mA, VO_REG resistor divider ratio = 9:1 0.4971 0.5017 0.5079
ILOAD = 1000 mA, VO_REG resistor divider ratio = 19:1 0.4977 0.5027 0.5091
ILOAD = 1 mA, VO_REG resistor divider ratio = 19:1 0.4978 0.5029 0.5098
KILIM Current programming factor for hardware short circuit protection RILIM = KILIM / IILIM, where IILIM is the hardware current limit
IOUT = 900 mA		 842 AΩ
IOUT_RANGE Current limit programming range 2300 mA
ICOMM Output current limit during communication IOUT ≥ 400 mA IOUT – 50 mA
100 mA ≤ IOUT < 400 mA IOUT + 50
IOUT < 100 mA 200
tHOLD-OFF Hold off time for the communication current limit during startup 1 s
TS/CTRL
VTS-Bias TS bias voltage (internal) ITS-Bias < 100 µA and communication is active (periodically driven, see tTS/CTRL-Meas) 1.8 V
VCTRL-HI CTRL pin threshold for a high VTS/CTRL: 50 to 150 mV 90 105 120 mV
TTS/CTRL-Meas Time period of TS/CTRL measurements, when TS is being driven TS bias voltage is only driven when power packets are sent 1700 ms
VTS-HOT Voltage at TS pin when device shuts down 0.38 V
THERMAL PROTECTION
TJ(OFF) Thermal shutdown temperature 155 °C
TJ(OFF-HYS) Thermal shutdown hysteresis 20 °C
OUTPUT LOGIC LEVELS ON WPG
VOL Open-drain WPG pin ISINK = 5 mA 550 mV
IOFF,STAT WPG leakage current when disabled VWPG = 20 V 1 µA
COMM PIN
RDS-ON(COMM) COMM1 and COMM2 VRECT = 2.6 V 1 Ω
ƒCOMM Signaling frequency on COMMx pin for WPC 2.00 Kbps
IOFF,COMM COMMx pin leakage current VCOMM1 = 20 V, VCOMM2 = 20 V 1 µA
CLAMP PIN
RDS-ON(CLAMP) CLAMP1 and CLAMP2 0.5 Ω
ADAPTER ENABLE
VAD-EN VAD rising threshold voltage VAD 0 V to 5 V 3.5 3.6 3.8 V
VAD-EN-HYS VAD-EN hysteresis VAD 5 V to 0 V 450 mV
IAD Input leakage current VRECT = 0 V, VAD = 5 V 50 μA
RAD_EN-OUT Pullup resistance from AD-EN to OUT when adapter mode is disabled and VOUT > VAD VAD = 0 V, VOUT = 5 V 230 350 Ω
VAD_EN-ON Voltage difference between VAD and VAD-EN when adapter mode is enabled VAD = 5 V, 0°C ≤ TJ ≤ 85°C 4 4.5 5 V
VAD = 9 V, 0°C ≤ TJ ≤ 85°C 3 6 7 V
SYNCHRONOUS RECTIFIER
ISYNC-EN IOUT at which the synchronous rectifier enters half synchronous mode IOUT: 200 to 0 mA 100 mA
ISYNC-EN-HYST Hysteresis for IOUT,RECT-EN (full-synchronous mode enabled) IOUT: 0 to 200 mA 40 mA
VHS-DIODE High-side diode drop when the rectifier is in half synchronous mode IAC-VRECT = 250 mA, and
TJ = 25°C		 0.7 V
I2C
VIL Input low threshold level SDA V(PULLUP) = 1.8 V, SDA 0.4 V
VIH Input high threshold level SDA V(PULLUP) = 1.8 V, SDA 1.4 V
VIL Input low threshold level SCL V(PULLUP) = 1.8 V, SCL 0.4 V
VIH Input high threshold level SCL V(PULLUP) = 1.8 V, SCL 1.4 V
I2C speed Typical 100 kHz

7.6 Typical Characteristics

bq51025 D002_SLUSBX7.gif
Temperature = 25°C
Figure 1. Output Regulation as a Function of Load
bq51025 D004_SLUSBX7.gif
Figure 3. UVLO as a Function of Junction Temperature
bq51025 D006_SLUSBX7.gif
Figure 5. VO_REG by Different I2C Codes, Resistor Divider Ratio = 19:1
bq51025 D003_SLUSBX7.gif
Figure 2. KILIM as a Function of Load Current
bq51025 D005_SLUSBX7.gif
Figure 4. VO_REG by Different I2C Codes, Resistor Divider Ratio = 9:1