SWRS304D October   2024  – November 2025 CC2744R7-Q1 , CC2745P10-Q1 , CC2745R10-Q1 , CC2745R7-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
      1. 6.1.1 Pin Diagram—RHA package
    2. 6.2 Signal Descriptions
      1. 6.2.1 Signal Descriptions—RHA Package
    3. 6.3 Connections for Unused Pins and Modules
      1. 6.3.1 Connections for Unused Pins and Modules—RHA Package
    4. 6.4 Peripheral Pin Mapping
      1. 6.4.1 RHA Peripheral Pin Mapping
    5. 6.5 Peripheral Signal Descriptions
      1. 6.5.1 RHA Peripheral Signal Descriptions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD and MSL Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  DC/DC
    5. 7.5  GLDO
    6. 7.6  Power Supply and Modules
    7. 7.7  Battery Monitor
    8. 7.8  BATMON Temperature Sensor
    9. 7.9  Power Consumption—Power Modes
    10. 7.10 Power Consumption—Radio Modes (R variant)
    11. 7.11 Power Consumption–Radio Modes (P variant)
    12. 7.12 Nonvolatile (Flash) Memory Characteristics
    13. 7.13 Thermal Resistance Characteristics
    14. 7.14 RF Frequency Bands
    15. 7.15 Bluetooth Low Energy—Receive (RX)
    16. 7.16 Bluetooth Low Energy—Transmit (TX)
    17. 7.17 Bluetooth Channel Sounding
    18. 7.18 2.4GHz RX/TX CW
    19. 7.19 Timing and Switching Characteristics
      1. 7.19.1 Reset Timing
      2. 7.19.2 Wakeup Timing
      3. 7.19.3 Clock Specifications
        1. 7.19.3.1 48MHz Crystal Oscillator (HFXT)
        2. 7.19.3.2 96MHz RC Oscillator (HFOSC)
        3. 7.19.3.3 80/90/98MHz RC Oscillator (AFOSC)
        4. 7.19.3.4 32kHz Crystal Oscillator (LFXT)
        5. 7.19.3.5 32kHz RC Oscillator (LFOSC)
    20. 7.20 Peripheral Characteristics
      1. 7.20.1 UART
        1. 7.20.1.1 UART Characteristics
      2. 7.20.2 SPI
        1. 7.20.2.1 SPI Characteristics
        2. 7.20.2.2 SPI Controller Mode
        3. 7.20.2.3 SPI Timing Diagrams—Controller Mode
        4. 7.20.2.4 SPI Peripheral Mode
        5. 7.20.2.5 SPI Timing Diagrams—Peripheral Mode
      3. 7.20.3 I2C
        1. 7.20.3.1 I2C Characteristics
        2. 7.20.3.2 I2C Timing Diagram
      4. 7.20.4 I2S
        1. 7.20.4.1 I2S Controller Mode
        2. 7.20.4.2 I2S Peripheral Mode
      5. 7.20.5 CAN-FD
        1. 7.20.5.1 CAN-FD Characteristics
      6. 7.20.6 GPIO
        1. 7.20.6.1 GPIO DC Characteristics
      7. 7.20.7 ADC
        1. 7.20.7.1 Analog-to-Digital Converter (ADC) Characteristics
      8. 7.20.8 Comparators
        1. 7.20.8.1 Low power comparator
      9. 7.20.9 Voltage Glitch Monitor
    21. 7.21 Typical Characteristics
      1. 7.21.1 MCU Current
      2. 7.21.2 RX Current
      3. 7.21.3 TX Current
      4. 7.21.4 RX Performance
      5. 7.21.5 TX Performance
      6. 7.21.6 ADC Performance
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Bluetooth Low Energy
    4. 8.4  Memory
    5. 8.5  Hardware Security Module (HSM)
    6. 8.6  Cryptography
    7. 8.7  Timers
    8. 8.8  Algorithm Processing Unit (APU)
    9. 8.9  Serial Peripherals and I/O
    10. 8.10 Battery and Temperature Monitor
    11. 8.11 Voltage Glitch Monitor (VGM)
    12. 8.12 µDMA
    13. 8.13 Debug
    14. 8.14 Power Management
    15. 8.15 Clock Systems
    16. 8.16 Network Processor
    17. 8.17 Integrated BALUN, High Power PA (Power Amplifier)
  10. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
      2. 10.2.2 Software License and Notice
    3. 10.3 Documentation Support
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.20.7.1 Analog-to-Digital Converter (ADC) Characteristics

Tc = 25°C, VDDS = 3.0V, unless otherwise noted.(1)
Performance numbers require use of offset and gain adjustments in software by TI-provided ADC drivers.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ADC Power Supply and Input Range Conditions
V(Ax) Analog input voltage range All ADC analog input pins Ax 0 VDDS V
I(ADC) single-ended mode Operating supply current
into VDDS terminal 		 RES = 0x0 (12Bit mode), Fs = 1.2MSPS, Internal reference OFF (ADC.REFCFG_REFEN = 0), VeREF+ = VDDS 480 μA
RES = 0x0 (12Bit mode), Fs = 266ksps, Internal reference ON (ADC.REFCFG_REFEN = 1), REFVSEL = 2.5V 365
CI GPIO  Input capacitance into a single terminal 5 7 pF
RI GPIO Input MUX ON-resistance 0.5 1 kΩ
ADC Switching Characteristics
FS ADCREF ADC sampling frequency when using the internal ADC reference voltage ADC.REFCFG_REFEN = 1, RES = 0x0 (12Bits), VDDS = 1.71V to VDDSmax 267(2) ksps
FS ADCREF ADC sampling frequency when using the internal ADC reference voltage ADC.REFCFG_REFEN = 1, RES = 0x1 (10Bits), VDDS = 1.71V to VDDSmax 308(2) ksps
FS ADCREF ADC sampling frequency when using the internal ADC reference voltage ADC.REFCFG_REFEN = 1, RES = 0x2 (8Bits), VDDS = 1.71V to VDDSmax 400(2) ksps
FS EXTREF ADC sampling frequency when using the external ADC reference voltage ADC.REFCFG_REFEN = 0, VeREF+ = VDDS, RES = 0x0 (12Bits), VDDS = 1.71V to VDDSmax 1.2(2) Msps
FS EXTREF ADC sampling frequency when using the external ADC reference voltage ADC.REFCFG_REFEN = 0, VeREF+ = VDDS, RES = 0x1 (10Bits), VDDS = 1.71V to VDDSmax 1.33(2) Msps
FS EXTREF ADC sampling frequency when using the external ADC reference voltage ADC.REFCFG_REFEN = 0, VeREF+ = VDDS, RES = 0x2 (8Bits), VDDS = 1.71V to VDDSmax 1.6(2) Msps
NCONVERT Clock cycles for conversion RES = 0x0 (12Bits) 14 cycles
NCONVERT Clock cycles for conversion RES = 0x1 (10Bits) 12 cycles
NCONVERT Clock cycles for conversion RES = 0x2 (8Bits) 9 cycles
tSample Sampling time RES = 0x0 (12-bit), RS = 25Ω, Cpext = 10pF. ±0.5 LSB settling 166.6 ns
tVSUPPLY/3(sample) Sample time required when Vsupply/3 channel is selected 20 µs
ADC Linearity Parameters
EI Integral linearity error (INL) for single-ended inputs 12-bit Mode, VR+ = VeREF+ = VDDS, VDDS = 1.71-->3.8 ±2 LSB
ED Differential linearity error (DNL) 12-bit Mode, VR+ = VeREF+ = VDDS, VDDS = 1.71-->3.8 ±1 LSB
EO Offset error External reference, VR+ = VeREF+ = VDDS, VDDS = 1.71-->3.8 -3 3 mV
EO Offset error Internal reference, VR+ = REFVSEL = 2.5V -3 3 mV
EG Gain error External Reference, VR+ = VeREF+ = VDDS , VDD = 1.71-->3.8 ±2 LSB
EG Gain error Internal reference, VR+ = REFVSEL = 2.5V ±40 LSB
ADC Dynamic Parameters
ENOB Effective number of bits  ADC.REFCFG_REFEN = 0, VeREF+ = VDDS = 3.3V, VeREF– = 0V, RES = 0x2 (8-bit) 8 bit
ENOB Effective number of bits  ADC.REFCFG_REFEN = 0, VeREF+ = VDDS = 3.3V, VeREF– = 0V, RES = 0x1 (10-bit) 9.9 bit
ENOB Effective number of bits  ADC.REFCFG_REFEN = 0, VeREF+ = VDDS = 3.3V, VeREF– = 0V, RES = 0x0 (12-bit) 11.2 bit
ENOB Effective number of bits ADC.REFCFG_REFEN = 1, REFVSEL = {2.5V, 1.4V}, RES = 0x2 (8-bit) 8 bit
ENOB Effective number of bits ADC.REFCFG_REFEN = 1, REFVSEL = {2.5V, 1.4V} , RES = 0x1 (10-bit) 9.6
 		 bit
ENOB Effective number of bits ADC.REFCFG_REFEN = 1, REFVSEL = {2.5V, 1.4V}, RES = 0x0 (12-bit) 10.4
 		 bit
ENOB Effective number of bits VDDS reference, RES = 0x0 (12-bit) 11.2 bit
SINAD Signal-to-noise and distortion ratio ADC.REFCFG_REFEN = 0, VeREF+ = VDDS = 3.3V, VeREF– = 0V, RES = 0x0 (12-bit)
 
69.18		 dB
SINAD Signal-to-noise and distortion ratio ADC.REFCFG_REFEN = 1, REFVSEL = {2.5V, 1.4V}, RES = 0x0 (12-bit)
 		 64.37 dB
SINAD Signal-to-noise and distortion ratio VDDS reference, RES = 0x0 (12-bit)
 		 69.18
 		 dB
ADC External Reference
EXTREF Positive external reference voltage input ADC.REFCFG_REFEN=0, ADC reference sourced from external reference pin (VeREF+) 1.4 VDDS V
EXTREF Negative external reference voltage input ADC.REFCFG_REFEN=0, ADC reference sourced from external reference pin (VeREF–) 0 V
ADC Supply Monitor
ADC Internal Input: VSUPPLY / 3 Accuracy Vsupply voltage divider accuracy for supply monitoring ADC input channel: Vsupply monitor -1.5% 1.5%
ADC Internal Input: IVsupply / 3 Vsupply voltage divider current consumption ADC input channel Vsupply monitor. Vsupply=VDDS=3.3V 10 µA
ADC Internal and VDDS Reference
VDDSREF Positive ADC reference voltage ADC reference sourced from VDDS  VDDS V
ADCREF Internal ADC Reference Voltage ADC.REFCFG_REFEN = 1, REFVSEL = 0, VDDS = 1.71V - VDDSmax 1.4 V
ADCREF_EN = 1, REFVSEL = 1, VDDS = 2.7V - VDDSmax 2.5 V
IADCREF Operating supply current into VDDA terminal with internal reference ON ADC.REFCFG_REFEN = 1, VDDA = 1.7V to VDDAmax, REFVSEL = {0,1}  80 µA
tON Internal ADC Reference Voltage power on-time ADC.REFCFG_REFEN = 1 2 µs
(1) Using IEEE Std 1241-2010 for terminology and test methods
(2) Measured with 48MHz HFXT