SCHS338B March   2003  – May 2025 CD54ACT151 , CD74ACT151

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics
    7. 4.7 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Balanced CMOS Push-Pull Outputs
      2. 6.3.2 TTL-Compatible CMOS Inputs
      3. 6.3.3 Clamp Diode Structure
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Power Considerations
        2. 7.2.1.2 Input Considerations
        3. 7.2.1.3 Output Considerations
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • BQB|16
  • PW|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

2 Description

These data selectors/multiplexers provide full binary decoding to select one of eight data sources. The strobe (G) input must be at a low logic level to enable the inputs. A high level at the strobe terminal forces the W output high and the Y output low.

Device Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)BODY SIZE(3)
CDx4ACT151D (SOIC, 16)8.65mm × 6mm8.65mm × 3.9mm
J (CDIP , 16)19.55mm × 7.9mm19.55 mm × 6.7mm
PW (TSSOP, 16)5mm × 6.4mm5mm × 4.4mm
BQB (WQFN, 16)3.5mm × 2.5mm3.5mm × 2.5mm
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.
CD54ACT151 CD74ACT151 Logic Diagram (Positive Logic)Logic Diagram (Positive Logic)