SCHS202D November   1997  – March 2022 CD54HC4024 , CD54HCT4024 , CD74HC4024 , CD74HCT4024

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings (1)
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Specifications
    6. 5.6 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • PW|14
  • N|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.3 Thermal Information

THERMAL METRIC D (SOIC) N (PDIP) PW (TSSOP) UNIT
14 PINS 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance(1) 86 80 113 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report.