SCHS203E November   1998  – July 2022 CD54HC4040 , CD54HCT4040 , CD74HC4040 , CD74HCT4040

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions (1)
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Characteristics
    6. 5.6 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Switching Characteristics

Input tr, tf = 6 ns. See Parameter Measurement Information
PARAMETER TEST CONDITIONS VCC (V) 25℃ -40℃ to 85℃ -55℃ to 125℃ UNIT
MIN TYP MAX MIN MAX MIN MAX
HC TYPES
tPLH, tPHL

Propagation delay time

CP to Q1' Output

 CL = 50 pF 2 140 175 210 ns
4.5 28 35 42
CL = 15 pF 5 11
CL = 50 pF 6 24 30 36
tPLH, tPHL Qn to Qn + 1 CL = 50 pF 2 75 95 110 ns
4.5 15 19 22
CL = 15 pF 5 4
CL = 50 pF 6 13 16 19
tPLH, tPHL MR to Qn CL = 50 pF 2 170 215 255 ns
4.5 34 43 51
5 14
6 29 37 43
tTLH, tTHL Output transition time CL = 50 pF 2 75 95 110 ns
4.5 15 19 22
6 13 16 19
CIN Input capacitance CL = 50 pF 10 10 10 pF
CPD Power dissipation capacitance(1)(2) CL = 15 pF 5 40 pF
HCT TYPES
tPLH, tPHL

Propagation delay time

CP to Q1' Output

 CL = 50 pF 4.5 40 50 60 ns
CL = 15 pF 5 17
tPLH, tPHL Qn to Qn + 1 CL = 50 pF 4.5 15 19 22 ns
CL = 15 pF 5 4
tPLH, tPHL MR to Qn CL = 50 pF 4.5 40 50 60 ns
CL = 15 pF 5 17
tTLH, tTHL Output transition CL = 50 pF 4.5 15 19 22 ns
CIN Input capacitance CL = 50 pF 10 10 10 pF
CPD Power dissipation capacitance(1)(2) CL = 15 pF 5 45 pF
(1) CPD is used to determine the dynamic power consumption, per package.
(2) PD = VCC2fi(CPD + CL) where fi = Input frequency, CL = Output load capacitance, VCC = Supply Voltage.