SLPS516 August   2014 CSD17577Q5A

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Trademarks
    2. 6.2 Electrostatic Discharge Caution
    3. 6.3 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q5A Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Opening
    4. 7.4 Q5A Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DQJ|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA 30 V
IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 24 V 1 μA
IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA 1.1 1.4 1.8 V
RDS(on) Drain-to-Source On-Resistance VGS = 4.5 V, ID = 10 A 4.8 5.8 mΩ
VGS = 10 V, ID = 18 A 3.5 4.2 mΩ
gƒs Transconductance VDS = 3 V, ID = 18 A 79 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VGS = 0 V, VDS = 15 V, ƒ = 1 MHz 1780 2310 pF
Coss Output Capacitance 208 270 pF
Crss Reverse Transfer Capacitance 79 102 pF
RG Series Gate Resistance 1.4 2.8 Ω
Qg Gate Charge Total (4.5 V) VDS = 15 V, ID = 18 A 13 17 nC
Qg Gate Charge Total (10 V) 27 35 nC
Qgd Gate Charge Gate-to-Drain 2.8 nC
Qgs Gate Charge Gate-to-Source 5.1 nC
Qg(th) Gate Charge at Vth 2.5 nC
Qoss Output Charge VDS = 15 V, VGS = 0 V 6 nC
td(on) Turn On Delay Time VDS = 15 V, VGS = 10 V,
IDS = 18 A, RG = 0 Ω		 3 ns
tr Rise Time 12 ns
td(off) Turn Off Delay Time 18 ns
tƒ Fall Time 2 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage ISD = 18 A, VGS = 0 V 0.8 1 V
Qrr Reverse Recovery Charge VDS= 15 V, IF = 18 A,
di/dt = 300 A/μs		 8.2 nC
trr Reverse Recovery Time 9.3 ns

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-Case Thermal Resistance(1) 2.8 °C/W
RθJA Junction-to-Ambient Thermal Resistance(1)(2) 50
(1) RθJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inches × 1.5-inches
(3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
M0137-01_LPS198.gif
 Max RθJA = 50°C/W when mounted on 1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick) Cu.
M0137-02_LPS198.gif
 Max RθJA = 140°C/W when mounted on a minimum pad area of
2-oz. (0.071-mm thick) Cu.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
graph01_SLPS516.png
Figure 1. Transient Thermal Impedance
graph02_SLPS516.png
Figure 2. Saturation Characteristics
graph04_SLPS516.png
ID = 18 A VDS = 15 V
Figure 4. Gate Charge
graph06_SLPS516.png
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
graph08_SLPS516.png
ID = 18 A
Figure 8. Normalized On-State Resistance vs Temperature
graph10_SLPS516.png
Single Pulse, Max RθJC = 2.8°C/W
Figure 10. Maximum Safe Operating Area
graph12_SLPS516.png
Figure 12. Maximum Drain Current vs Temperature
graph03_SLPS516.png
VDS = 5 V
Figure 3. Transfer Characteristics
graph05_SLPS516.png
Figure 5. Capacitance
graph07_SLPS516.png
Figure 7. On-State Resistance vs Gate-to-Source Voltage
graph09_SLPS516.png
Figure 9. Typical Diode Forward Voltage
graph11_SLPS516.png
Figure 11. Single Pulse Unclamped Inductive Switching