SLPS524 March   2015 CSD17579Q5A

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Trademarks
    2. 6.2 Electrostatic Discharge Caution
    3. 6.3 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q5A Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Opening
    4. 7.4 Q5A Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DQJ|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA 30 V
IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 24 V 1 μA
IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA 1.0 1.5 2.0 V
RDS(on) Drain-to-Source On-Resistance VGS = 4.5 V, ID = 8 A 11.6 13.3 mΩ
VGS = 10 V, ID = 8 A 8.4 9.7 mΩ
gƒs Transconductance VDS = 3 V, ID = 8 A 36 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VGS = 0 V, VDS = 15 V, ƒ = 1 MHz 796 1030 pF
Coss Output Capacitance 95 124 pF
Crss Reverse Transfer Capacitance 40 52 pF
RG Series Gate Resistance 1.9 3.8 Ω
Qg Gate Charge Total (4.5 V) VDS = 15 V, ID = 8 A 5.4 7 nC
Qg Gate Charge Total (10 V) 11.6 15.1 nC
Qgd Gate Charge Gate-to-Drain 1.2 nC
Qgs Gate Charge Gate-to-Source 2.3 nC
Qg(th) Gate Charge at Vth 1.1 nC
Qoss Output Charge VDS = 15 V, VGS = 0 V 2.9 nC
td(on) Turn On Delay Time VDS = 15 V, VGS = 10 V,
IDS = 8 A, RG = 0 Ω		 3 ns
tr Rise Time 7 ns
td(off) Turn Off Delay Time 13 ns
tƒ Fall Time 1 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage ISD = 8 A, VGS = 0 V 0.8 1.0 V
Qrr Reverse Recovery Charge VDS= 15 V, IF = 8 A,
di/dt = 300 A/μs		 4.2 nC
trr Reverse Recovery Time 5.7 ns

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-Case Thermal Resistance (1) 4.3 °C/W
RθJA Junction-to-Ambient Thermal Resistance(1)(2) 50
(1) RθJC is determined with the device mounted on a 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu pad on a 1.5 inches × 1.5 inches
(3.81 cm × 3.81 cm), 0.06 inch (1.52 mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1 inch2 (6.45-cm2), 2 oz. (0.071 mm thick) Cu.
CSD17579Q5A M0137-01_LPS198.gif
 Max RθJA = 50°C/W when mounted on 1 inch2 (6.45 cm2) of
2 oz. (0.071 mm thick) Cu.
CSD17579Q5A M0137-02_LPS198.gif
 Max RθJA = 140°C/W when mounted on a minimum pad area of
2 oz. (0.071 mm thick) Cu.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
CSD17579Q5A D001_SLPS524.png
Figure 1. Transient Thermal Impedance
CSD17579Q5A D002_SLPS524.gif
Figure 2. Saturation Characteristics
CSD17579Q5A D004_SLPS524.gif
ID = 8 A VDS = 15 V
Figure 4. Gate Charge
CSD17579Q5A D006_SLPS524.gif
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
CSD17579Q5A D008_SLPS524.gif
ID = 8 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD17579Q5A D010_SLPS524.gif
Single Pulse, Max RθJC = 4.3°C/W
Figure 10. Maximum Safe Operating Area
CSD17579Q5A D012_SLPS524.gif
Figure 12. Maximum Drain Current vs Temperature
CSD17579Q5A D003_SLPS524.gif
VDS = 5 V
Figure 3. Transfer Characteristics
CSD17579Q5A D005_SLPS524.gif
Figure 5. Capacitance
CSD17579Q5A D007_SLPS524.gif
Figure 7. On-State Resistance vs Gate-to-Source Voltage
CSD17579Q5A D009_SLPS524.gif
Figure 9. Typical Diode Forward Voltage
CSD17579Q5A D011_SLPS524.gif
Figure 11. Single Pulse Unclamped Inductive Switching