SNAS395F December   2007  – October 2016 DAC121C081 , DAC121C085

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 AC and Timing Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DAC Section
      2. 8.3.2 Output Amplifier
      3. 8.3.3 Reference Voltage
      4. 8.3.4 Serial Interface
        1. 8.3.4.1 Basic I2C Protocol
        2. 8.3.4.2 Standard-Fast Mode
        3. 8.3.4.3 High-Speed (Hs) Mode
        4. 8.3.4.4 I2C Slave (Hardware) Address
      5. 8.3.5 Power-On Reset
      6. 8.3.6 Simultaneous Reset
      7. 8.3.7 Additional Timing Information: toutz
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes
    5. 8.5 Programming
      1. 8.5.1 Writing to the DAC Register
      2. 8.5.2 Reading from the DAC Register
    6. 8.6 Registers
      1. 8.6.1 DAC Register
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Bipolar Operation
      2. 9.1.2 DSP/Microprocessor Interfacing
        1. 9.1.2.1 Interfacing to the 2-wire Bus
        2. 9.1.2.2 Interfacing to a Hs-mode Bus
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Using References as Power Supplies
      1. 10.1.1 LM4132
      2. 10.1.2 LM4050
      3. 10.1.3 LP3985
      4. 10.1.4 LP2980
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
        1. 12.1.1.1 Specification Definitions
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Ensured Monotonicity to 12-Bits
  • Low Power Operation: 156-µA Maximum at 3.3 V
  • Extended Power Supply Range (2.7 V to 5.5 V)
  • I2C-Compatible 2-Wire Interface Which Supports Standard (100-kHz), Fast (400-kHz), and High-Speed (3.4-MHz) Modes
  • Rail-to-Rail Voltage Output
  • Very Small Package
  • Resolution: 12 bits
  • INL: ±8 LSB (Maximum)
  • DNL: 0.6 / –0.5 LSB (Maximum)
  • Settling Time: 8.5 µs (Maximum)
  • Zero Code Error: 10 mV (Maximum)
  • Full-Scale Error: −0.7%FS (Maximum)
  • Supply Power
    • Normal: 380 µW (3 V) / 730 µW (5 V) (Typical)
    • Power Down: 0.5 µW (3 V) / 0.9 µW (5 V) (Typical)

2 Applications

  • Industrial Process Control
  • Portable Instruments
  • Digital Gain and Offset Adjustment
  • Programmable Voltage and Current Sources
  • Test Equipment

3 Description

The DAC121C081 is a 12-bit, single-channel, voltage-output digital-to-analog converter (DAC) that operates from a 2.7-V to 5.5-V supply. The output amplifier allows rail-to-rail output swing and has an 8.5-µs settling time. The DAC121C081 uses the supply voltage as the reference to provide the widest dynamic output range, and typically consumes 132 µA while operating at 5 V. It is available in 6-pin SOT and WSON packages, and provides three address options (pin selectable).

As an alternative, the DAC121C085 provides nine I2C addressing options and uses an external reference. It has the same performance and settling time as the DAC121C081, and is available in an 8-lead VSSOP.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
DAC121C081 WSON (6) 2.20 mm × 2.50 mm
SOT (6) 1.60 mm × 2.90 mm
DAC121C085 VSSOP (8) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

DAC121C081 DAC121C085 30004903.gif