SBAS794E november   2018  – august 2023 DAC60501 , DAC70501 , DAC80501

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Timing Requirements: SPI Mode
    7. 7.7  Timing Requirements: I2C Standard Mode
    8. 7.8  Timing Requirements: I2C Fast Mode
    9. 7.9  Timing Requirements: I2C Fast-Mode Plus
    10. 7.10 Timing Diagrams
    11. 7.11 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DAC Architecture
        1. 8.3.1.1 DAC Transfer Function
        2. 8.3.1.2 DAC Register Structure
        3. 8.3.1.3 Output Amplifier
      2. 8.3.2 Internal Reference
        1. 8.3.2.1 Solder Heat Reflow
      3. 8.3.3 Power-On-Reset (POR)
      4. 8.3.4 Software Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Mode
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
        1. 8.5.1.1 SPI Mode
          1. 8.5.1.1.1 SYNC Interrupt
        2. 8.5.1.2 I2C Mode
          1. 8.5.1.2.1 F/S Mode Protocol
          2. 8.5.1.2.2 I2C Update Sequence
            1. 8.5.1.2.2.1 Address Byte
            2. 8.5.1.2.2.2 Command Byte
            3. 8.5.1.2.2.3 Data Byte (MSDB and LSDB)
          3. 8.5.1.2.3 I2C Read Sequence
    6. 8.6 Register Map
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Charge Injection
        2. 9.2.2.2 Voltage Droop
        3. 9.2.2.3 Output Offset Error
        4. 9.2.2.4 Switch Selection
        5. 9.2.2.5 Amplifier Selection
        6. 9.2.2.6 Hold Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The 16-bit DAC80501, 14-bit DAC70501, and 12-bit DAC60501 (DACx0501) digital-to-analog converters (DACs) are highly accurate, low-power devices with voltage-output. The DACx0501 are specified monotonic by design, and offer linearity of < 1 LSB. These devices include a 2.5-V, 5-ppm/°C internal reference, giving full-scale output voltage ranges of 1.25 V, 2.5 V, or 5 V. The DACx0501 incorporate a power-on-reset (POR) circuit that makes sure the DAC output powers up at zero scale or midscale, and remains at that scale until a valid code is written to the device. These devices consume a low current of 1 mA, and include a power-down feature that reduces current consumption to typically 15 µA at 5 V.

The digital interface of the DACx0501 can be configured to SPI or I2C mode using the SPI2C pin. In SPI mode, the DACx0501 use a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz. In I2C mode, the DACx0501 operate in standard mode (100Kbps), fast mode (400Kbps), and fast mode plus (1.0Mbps).

Device Information
PART NUMBER(1) RESOLUTION PACKAGE(2)
DAC80501 16-bit WSON (8)
VSSOP (10)
DAC70501 14-bit WSON (8)
VSSOP (10)
DAC60501 12-bit WSON (8)
VSSOP (10)
(2) For all available packages, see the package option addendum at the end of the data sheet.

 

GUID-36787F4E-1387-46E8-90EA-B22B32DF5906-low.gifFunctional Block Diagram
GUID-ED6A5548-6DC4-4F19-9545-A6EE0CD2FFBF-low.gifOffset Trimming With the DACx0501