SLASEH4 November 2023 DAC61401 , DAC81401
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Table 7-1 lists the memory-mapped registers for the device. Consider all register addresses not listed as reserved locations and do not modify the register contents.
ADDR (HEX) | REGISTER | TYPE | RESET (HEX) | BIT DESCRIPTION | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | ||||
00 | NOP | W | 0000 | NOP[15:0] | |||||||||||||||
01 | DEVICEID | R | 029C(1) or 024C(2) |
DEVICEID[13:0] | VERSIONID[1:0] | ||||||||||||||
02 | STATUS | R | 0000 | RESERVED | CRC-ALM | DAC-BUSY | TEMP-ALM | ||||||||||||
03 | SPICONFIG | R/W | 0AA4 | RESERVED | TEMPALM-EN | DACBUSY-EN | CRCALM-EN | RESERVED | DEV-PWDWN | CRC-EN | RSVD | SDO-EN | FSDO | RSVD | |||||
04 | GENCONFIG | R/W | 4000 | RSVD | REF-PWDWN | RESERVED | |||||||||||||
09 | DACPWDWN | R/W | FFFF | RESERVED | DAC-PWDWN | ||||||||||||||
0A | DACRANGE | W | 0000 | RESERVED | DAC-RANGE[3:0] | ||||||||||||||
0E | TRIGGER | R/W | 0000 | RESERVED | SOFT-CLR | ALM-RESET | RESERVED | SOFT-RESET[3:0] | |||||||||||
10 | DAC | W | 0000 | DAC-DATA[15:0] |