DLPS026F August 2012 – June 2019 DLP7000
The DLP7000 chipset includes the DLPC410 controller which provides a high-speed LVDS data and control interface for DMD control. This interface is also connected to a second FPGA used to drive applications (not included in the chipset). The DLPC410 generates DMD and DLPA200 initialization and control signals in response to the inputs on the control interface.
For more information, see the DLPC410 data sheet DLPS024.