SLIS163G December   2014  – March 2017 DRV5023-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Magnetic Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Field Direction Definition
      2. 7.3.2 Device Output
      3. 7.3.3 Power-On Time
      4. 7.3.4 Output Stage
      5. 7.3.5 Protection Circuits
        1. 7.3.5.1 Overcurrent Protection (OCP)
        2. 7.3.5.2 Load Dump Protection
        3. 7.3.5.3 Reverse Supply Protection
        4. 7.3.5.4 Output Jitter Characteristic
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Standard Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Configuration Example
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Alternative Two-Wire Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
      2. 11.1.2 Device Markings
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device and Documentation Support

Device Support

Device Nomenclature

Figure 26 shows a legend for reading the complete device name for and DRV5023-Q1 device.

DRV5023-Q1 dev_nomenclature_lis163.gif Figure 26. Device Nomenclature

Device Markings

DRV5023-Q1 package_sot_slis150.gif Figure 27. SOT-23 (DBZ) Package
DRV5023-Q1 package_sip_slis150.gif Figure 28. TO-92 (LPG) Package
DRV5023-Q1 inline_hall_sensor_slis150.gif indicates the Hall effect sensor (not to scale). The Hall element is located in the center of the package with a tolerance of ±100 µm. The height of the Hall element from the bottom of the package is 0.7 mm ±50 µm in the DBZ package and 0.987 mm ±50 µm in the LPG package.

Documentation Support

Related Documentation

For related documentation see the following:

Understanding & Applying Hall Effect Sensor Datasheets

Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.