SLOS681C January   2011  – August 2019 DRV632

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Diagram
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Operating Characteristics
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Line Driver Amplifiers
      2. 9.3.2 Charge-Pump Flying Capacitor and PVSS Capacitor
      3. 9.3.3 Decoupling Capacitors
      4. 9.3.4 Gain-Setting Resistor Ranges
      5. 9.3.5 Input-Blocking Capacitors
      6. 9.3.6 DRV632 UVP Operation
      7. 9.3.7 External Undervoltage Detection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Using the DRV632 as a Second-Order Filter
      2. 9.4.2 Mute Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Charge-Pump Flying, PVSS and Decoupling Capacitors
        2. 10.2.2.2 Second-Order Active Low-Pass Filters
        3. 10.2.2.3 UVP Resistor Divider
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Gain-Setting Resistors
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Line Driver Amplifiers

Single-supply line-driver amplifiers typically require dc-blocking capacitors. The top drawing in Figure 6 illustrates the conventional line-driver amplifier connection to the load and output signal. DC blocking capacitors are often large in value. The line load (typical resistive values of 600 Ω to 10 kΩ) combines with the dc blocking capacitors to form a high-pass filter. Equation 1 shows the relationship between the load impedance (RL), the capacitor (CO), and the cutoff frequency (fC).

Equation 1. DRV632 E001_LOS681.gif

CO can be determined using Equation 2, where the load impedance and the cutoff frequency are known.

Equation 2. DRV632 E002_LOS681.gif

If fC is low, the capacitor must then have a large value because the load resistance is small. Large capacitance values require large package sizes. Large package sizes consume PCB area, stand high above the PCB, increase cost of assembly, and can reduce the fidelity of the audio output signal.

DRV632 line_dvr_LOS681.gifFigure 6. Conventional and DirectPath Line Drivers

The DirectPath amplifier architecture operates from a single supply but makes use of an internal charge pump to provide a negative voltage rail. Combining the user-provided positive rail and the negative rail generated by the IC, the device operates in what is effectively a split-supply mode. The output voltages are now centered at zero volts with the capability to swing to the positive rail or negative rail. Combining this with the built-in click and pop reduction circuit, the DirectPath amplifier requires no output dc blocking capacitors. The bottom block diagram and waveform of Figure 6 illustrate the ground-referenced line-driver architecture. This is the architecture of the DRV632.