SLOSE51A June   2020  – December 2020 DRV8428E

ADVANCE INFORMATION  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1. 5.1 Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
      1. 6.5.1 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Bridge Control
      3. 7.3.3 Current Regulation, Off-time and Decay Modes
        1. 7.3.3.1 Mixed Decay
        2. 7.3.3.2 Smart tune Dynamic Decay
        3. 7.3.3.3 Smart tune Ripple Control
        4. 7.3.3.4 Blanking time
      4. 7.3.4 Linear Voltage Regulators
      5. 7.3.5 Logic and Seven-Level Pin Diagrams
      6. 7.3.6 Protection Circuits
        1. 7.3.6.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.6.2 Overcurrent Protection (OCP)
        3. 7.3.6.3 Thermal Shutdown (OTSD)
        4. 7.3.6.4 Fault Condition Summary
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode (nSLEEP = 0)
      2. 7.4.2 Operating Mode (nSLEEP = 1)
      3. 7.4.3 Functional Modes Summary
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Regulation
        2. 8.2.2.2 Power Dissipation and Thermal Calculation
          1. 8.2.2.2.1 Application Curves
    3. 8.3 Alternate Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
        1. 8.3.2.1 Current Regulation
          1. 8.3.2.1.1 Stepper Motor Speed
            1. 8.3.2.1.1.1 Decay Modes
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.1 Pin Functions

PINTYPEDESCRIPTION
NAMEPWPRTE
DRV8428EDRV8428PDRV8428EDRV8428P
DECAY/TOFF111199IDecay mode and off-time setting pin; seven-level pin.
AEN15—13—IBridge A enable input. Logic high enables bridge A; logic low disables the bridge Hi-Z.
AIN1—15—13IBridge A PWM input. Logic controls the state of H-bridge A; internal pulldown.
AIN2—14—12IBridge B PWM input. Logic controls the state of H-bridge B; internal pulldown.
AOUT13311OWinding A output. Connect to motor winding.
AOUT24422OWinding A output. Connect to motor winding.
APH14—12—IBridge A phase input. Logic high drives current from AOUT1 to AOUT2.
VREFA101088IReference voltage input. Voltage on this pin sets the full scale chopping current in H-bridge A.
BEN13—11—IBridge B enable input. Logic high enables bridge B; logic low disables the bridge Hi-Z.
BIN1—13—11IBridge B PWM input. Logic controls the state of H-bridge B; internal pulldown.
BIN2—12—10IBridge B PWM input. Logic controls the state of H-bridge B; internal pulldown.
BOUT16644OWinding B output. Connect to motor winding.
BOUT25533OWinding B output. Connect to motor winding.
BPH12—10—IBridge B phase input. Logic high drives current from BOUT1 to BOUT2.
VREFB9977IReference voltage input. Voltage on this pin sets the full scale chopping current in H-bridge B.
GND7755PWRDevice ground. Connect to system ground.
DVDD8866PWRLogic supply voltage. Connect a X7R, 0.47-μF to 1-μF, 6.3-V or 10-V rated ceramic capacitor to GND.
VM111515PWRPower supply. Connect to motor supply voltage and bypass to PGND with a 0.01-μF ceramic capacitor plus a bulk capacitor rated for VM.
PGND221616PWRPower ground. Connect to system ground.
nSLEEP16161414ISleep mode input. Logic high to enable device; logic low to enter low-power sleep mode; internal pulldown resistor. An nSLEEP low pulse clears faults.
PAD-----Thermal pad. Connect to system ground.