SLVSFV6B August   2022  – October 2023 DRV8962

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1  Overview
    2. 7.2  Functional Block Diagram
    3. 7.3  Feature Description
    4. 7.4  Independent Half-bridge Operation
    5. 7.5  Current Sensing and Regulation
      1. 7.5.1 Current Sensing and Feedback
      2. 7.5.2 Current Sensing with External Resistor
      3. 7.5.3 Current Regulation
    6. 7.6  Charge Pump
    7. 7.7  Linear Voltage Regulator
    8. 7.8  VCC Voltage Supply
    9. 7.9  Logic Level Pin Diagram
    10. 7.10 Protection Circuits
      1. 7.10.1 VM Undervoltage Lockout (UVLO)
      2. 7.10.2 VCP Undervoltage Lockout (CPUV)
      3. 7.10.3 Logic Supply Power on Reset (POR)
      4. 7.10.4 Overcurrent Protection (OCP)
      5. 7.10.5 Thermal Shutdown (OTSD)
      6. 7.10.6 nFAULT Output
      7. 7.10.7 Fault Condition Summary
    11. 7.11 Device Functional Modes
      1. 7.11.1 Sleep Mode
      2. 7.11.2 Operating Mode
      3. 7.11.3 nSLEEP Reset Pulse
      4. 7.11.4 Functional Modes Summary
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Driving Solenoid Loads
        1. 8.1.1.1 Solenoid Driver Typical Application
        2. 8.1.1.2 Thermal Calculations
          1. 8.1.1.2.1 Power Loss Calculations
          2. 8.1.1.2.2 Junction Temperature Estimation
        3. 8.1.1.3 Application Performance Plots
      2. 8.1.2 Driving Stepper Motors
        1. 8.1.2.1 Stepper Driver Typical Application
        2. 8.1.2.2 Power Loss Calculations
        3. 8.1.2.3 Junction Temperature Estimation
      3. 8.1.3 Driving Brushed-DC Motors
        1. 8.1.3.1 Brushed-DC Driver Typical Application
        2. 8.1.3.2 Power Loss Calculation
        3. 8.1.3.3 Junction Temperature Estimation
        4. 8.1.3.4 Driving Single Brushed-DC Motor
      4. 8.1.4 Driving Thermoelectric Coolers (TEC)
      5. 8.1.5 Driving Brushless DC Motors
  10. 9 Package Thermal Considerations
    1. 9.1 DDW Package
      1. 9.1.1 Thermal Performance
        1. 9.1.1.1 Steady-State Thermal Performance
        2. 9.1.1.2 Transient Thermal Performance
    2. 9.2 DDV Package
    3. 9.3 PCB Material Recommendation
  11. 10Power Supply Recommendations
    1. 10.1 Bulk Capacitance
    2. 10.2 Power Supplies
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.11.3 nSLEEP Reset Pulse

A latched fault can be cleared by an nSLEEP reset pulse. This pulse width must be greater than 20 µs and smaller than 40 µs. If nSLEEP is low for longer than 40 µs, but less than 120 µs, the faults are cleared and the device may or may not shutdown, as shown in the timing diagram below. This reset pulse does not affect the status of the charge pump or other functional blocks.
GUID-20220609-SS0I-FX9H-BC7B-CJWHLZRRVKCD-low.svgFigure 7-13 nSLEEP Reset Pulse