SNLS477B October 2014 – November 2018 DS90UB948-Q1
FREQUENCY_COUNTER is shown in and described in Table 39.
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|7-0||Frequency_Count||R/W||0x0|| Frequency Counter control
A write to this register will enable a frequency counter to count the number of pixel clock during a specified time interval. The time interval is equal to the value written multiplied by the oscillator clock period (nominally 50ns). A read of the register returns the number of pixel clock edges seen during the enabled interval. The frequency counter will freeze at 0xff if it reaches the maximum value. The frequency counter will provide a rough estimate of the pixel clock period. If the pixel clock frequency is known, the frequency counter may be used to determine the actual oscillator clock frequency.