SLVSEG9C May   2018  – February 2024 ESDS311 , ESDS312 , ESDS314

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings - JEDEC Specifications
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 IEC 61000-4-4 EFT Protection
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Signal Range
        2. 7.2.2.2 Operating Frequency
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

At TA = 25°C unless otherwise noted
PARAMETERTEST CONDITIONSDeviceMINTYPMAXUNIT
VRWMReverse stand-off voltageIIO < 500nA, across operating temperature range3.6V
ILEAKAGELeakage current at 3.6VVIO = 3.6V, Any IO pin to GND550nA
VBRFBreakdown voltage, IO to GND (1)IIO = 1mA4.57.5V
VFWDForward Voltage, GND to IOIIO = 1mA0.8V
VHOLDHolding Voltage, IO to GND (2)IIO = 1mA5V
VCLAMPSurge Clamping voltage, tp = 8/20µsIPP = 1A, Any IO pin to GNDESDS312/3145V
VCLAMPIPP = 12A, Any IO pin to GNDESDS3116.3V
ESDS312/3145.6
VCLAMPIPP = 25A, Any IO pin to GNDESDS3117.7V
ESDS312/3146.5
VCLAMPIPP = 1A, GND to any IO pinESDS312/3141V
VCLAMPIPP = 12A, GND to any IO pinESDS3113V
ESDS312/3142.1
VCLAMPIPP = 25A, GND to any IO pinESDS3114.9V
ESDS312/3143.6
VCLAMPTLP Clamping Voltage, tp = 100nsIPP = 16A, Any IO pin to GNDESDS3116.5V
ESDS312/3145.5
VCLAMPIPP = 16A, GND to any IO pinESDS3113.4V
ESDS312/3142.2
CLINELine capacitance, Any IO to GNDVIO = 0V, Vp-p = 30mV, f = 1MHz4.55.5pF
ΔCLINEVariation of line capacitanceCLINE1 - CLINE2, VIO = 0V, Vp-p = 30mV, f = 1MHzESDS312/3140.050.1pF
CCROSSLine-to-line capacitanceVIO = 0V, Vrms = 30mV, f = 1MHzESDS312/3142.252.75pF
VBRF and VBRR are defined as the voltage obtained at 1mA when sweeping the voltage up, before the device latches into the snapback state
VHOLD is defined as the voltage when 1mA is applied, after the device has successfully latched into the snapback state.