SBOS062D September   2000  – December 2025 INA126 , INA2126

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: INA126
    5. 5.5 Thermal Information: INA2126
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Single-Supply Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Setting the Gain
        2. 7.2.2.2 Offset Trimming
        3. 7.2.2.3 Input Bias Current Return
        4. 7.2.2.4 Input Common-Mode Range
        5. 7.2.2.5 Input Protection
        6. 7.2.2.6 Channel Crosstalk—Dual Version
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Low-Voltage Operation
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Thermal Information: INA126

THERMAL METRIC(1) INA126 UNIT
PDIP SOIC VSSOP
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 52.2 116.4 167.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 41.6 62.4 60.9 °C/W
RθJB Junction-to-board thermal resistance 29.4 57.7 88.9 °C/W
ψJT Junction-to-top characterization parameter 18.9 10.0 7.3 °C/W
ψJB Junction-to-board characterization parameter 29.2 57.1 87.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.