SBOSA81D may   2021  – august 2023 INA236

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements (I2C)
    7. 6.7 Timing Diagram
    8. 6.8 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Integrated Analog-to-Digital Convertor (ADC)
      2. 7.3.2 Power Calculation
      3. 7.3.3 Low Bias Current
      4. 7.3.4 Low Voltage Supply and Wide Common-Mode Voltage Range
      5. 7.3.5 ALERT Pin
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Verses Triggered Operation
      2. 7.4.2 Device Shutdown
      3. 7.4.3 Power-On Reset
      4. 7.4.4 Averaging and Conversion Time Considerations
    5. 7.5 Programming
      1. 7.5.1 I2C Serial Interface
      2. 7.5.2 Writing to and Reading Through the I2C Serial Interface
      3. 7.5.3 High-Speed I2C Mode
      4. 7.5.4 General Call Reset
      5. 7.5.5 General Call Start Byte
      6. 7.5.6 SMBus Alert Response
    6. 7.6 Register Maps
      1. 7.6.1 Device Registers
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Device Measurement Range and Resolution
      2. 8.1.2 Current and Power Calculations
      3. 8.1.3 ADC Output Data Rate and Noise Performance
      4. 8.1.4 Filtering and Input Considerations
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select the Shunt Resistor
        2. 8.2.2.2 Configure the Device
        3. 8.2.2.3 Program the Shunt Calibration Register
        4. 8.2.2.4 Set Desired Fault Thresholds
        5. 8.2.2.5 Calculate Returned Values
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DDF|8
  • YBJ|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, VVS = 3.3 V, VCM = 12 V, and VSENSE = (VIN+ – VIN–) = 0 mV (unless otherwise noted)

GUID-82E73FE5-9A17-4662-B762-E6AEB6D1F9DC-low.gif
Figure 6-2 Frequency Response
GUID-20210628-CA0I-HRQL-MDXW-HLXVBHD1VV4C-low.gif
Figure 6-4 Shunt Input Offset Voltage vs Temperature
GUID-20210628-CA0I-NBFC-Z3GD-DTC71PWGMJZ7-low.gif
Figure 6-6 Shunt Input CMRR vs Temperature
GUID-20210628-CA0I-ZK13-8J1B-DCR04LQLCLZT-low.gif
Figure 6-8 Shunt Gain Error vs Temperature
GUID-20210628-CA0I-XNRF-4HCR-NLCMBZGS8V9Q-low.gif
Figure 6-10 Bus Offset Voltage (VIN–) Production Distribution
GUID-20210628-CA0I-HK6V-JHTX-SRCC1PZ88Z6J-low.gif
Figure 6-12 Bus Voltage (VIN–) Gain Error Production Distribution
GUID-20210628-CA0I-JBLK-Z1S4-LLNSMTBRN3Q1-low.gif
Figure 6-14 Input Bias Current vs Differential Voltage
GUID-20210628-CA0I-RHJX-8V3N-7L3GSGZ2QFKB-low.gif
Figure 6-16 Input Bias Current vs Temperature

GUID-20210719-CA0I-1LNC-KDNX-0Q5JK5VCFZRR-low.gif
Figure 6-18 Quiescent Current vs Temperature
GUID-20210628-CA0I-VQKM-C0FC-CQ4WQM3B8FRM-low.gif
Figure 6-20 Quiescent Current - Shutdown vs Supply Voltage
GUID-20210628-CA0I-LFZR-ZXL6-7SWCP8MHCFWN-low.gif
Figure 6-22 Quiescent Current vs Clock (SCL) Frequency
GUID-20210628-CA0I-JN0Q-MRFF-NPGQV7F3GNMH-low.gif
Figure 6-3 Shunt Input Offset Voltage Production Distribution
GUID-20210628-CA0I-ZQ7V-FFTM-KZPQ202QFNVL-low.gif
Figure 6-5 CMRR Production Distribution
GUID-20210628-CA0I-HKMM-WH8C-XBCJJZJTXDLZ-low.gif
Figure 6-7 Shunt Voltage Gain Error Production Distribution
GUID-20210628-CA0I-DM37-HNS4-GXR3HVVP8QTP-low.gif
Figure 6-9 Shunt Gain Error vs Common-Mode Voltage
GUID-20210628-CA0I-8JDX-LGLL-WNHLNXGDQMS8-low.gif
Figure 6-11 Bus Offset Voltage (VIN–) vs Temperature
GUID-20210628-CA0I-WFGJ-SK86-HN4VC0LZ7VC9-low.gif
Figure 6-13 Bus Voltage (VIN–) Gain Error vs Temperature
GUID-20210628-CA0I-JRN6-0K4X-Z9PGCC4JS05F-low.gif
Figure 6-15 Input Bias Current vs Common-Mode Voltage (IB+, IB–)
GUID-20210628-CA0I-8HSF-WNVH-SJSMM17NMDVV-low.gif
Figure 6-17 Input Bias Current vs Temperature (Shutdown)
GUID-20210628-CA0I-XLS5-JBMZ-V870MWJP8XFK-low.gif
Figure 6-19 Quiescent Current vs Supply Voltage
GUID-20210628-CA0I-C990-4X2S-JRTTDVKTRZ18-low.gif
Figure 6-21 Quiescent Current - Shutdown vs Temperature
GUID-20210628-CA0I-JM6M-GVPR-7WCJ4XCBVMX1-low.gif
Figure 6-23 Quiescent Current - Shutdown vs SCL Frequency