SBOSAE5A December   2024  – November 2025 INA750B

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Integrated Shunt Resistor
      2. 6.3.2 Safe Operating Area
      3. 6.3.3 Short-Circuit Duration
      4. 6.3.4 Temperature Drift Correction
      5. 6.3.5 Enhanced PWM Rejection Operation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Adjusting the Output With the Reference Pin
        1. 6.4.1.1 Reference Pin Connections for Unidirectional Current Measurements
        2. 6.4.1.2 Ground Referenced Output
        3. 6.4.1.3 Reference Pin Connections for Bidirectional Current Measurements
        4. 6.4.1.4 Output Set to Mid-Supply Voltage
      2. 6.4.2 Adjustable Gain Set Using External Resistors
        1. 6.4.2.1 Adjustable Unity Gain
      3. 6.4.3 Thermal Alert Function
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Calculating Total Error
        1. 7.1.1.1 Error Sources
        2. 7.1.1.2 Reference Voltage Rejection Ratio Error
        3. 7.1.1.3 External Adjustable Gain Error
        4. 7.1.1.4 Total Error Example 1
        5. 7.1.1.5 Total Error Example 2
        6. 7.1.1.6 Total Error Example 3
        7. 7.1.1.7 Total Error Curves
    2. 7.2 Signal Filtering
    3. 7.3 Typical Application
      1. 7.3.1 High-side, High-drive, Solenoid Current-sense Application
        1. 7.3.1.1 Design Requirements
        2. 7.3.1.2 Detailed Design Procedure
        3. 7.3.1.3 Application Curve
      2. 7.3.2 Speaker Enhancements and Diagnostics Using Current Sense Amplifier
        1. 7.3.2.1 Design Requirements
        2. 7.3.2.2 Detailed Design Procedure
        3. 7.3.2.3 Application Curves
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Thermal Information

THERMAL METRIC(1) INA750x UNIT
REM (VQFN)
14 PINS
RθJA Junction-to-ambient thermal resistance 38.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 46.5 °C/W
RθJB Junction-to-board thermal resistance(2) 13.9 °C/W
ΨJT Junction-to-top characterization parameter(2) 2.2 °C/W
ΨJB Junction-to-board characterization parameter(2) 13.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.
(2) Thermal metrics are relative to the internal die and are conservative relative to the heating that occur from the package leadframe shunt. For more details on heating, see the Safe Operating Area section.