SLLSF22I April   2018  – August 2026 ISO1410 , ISO1412 , ISO1430 , ISO1432 , ISO1450 , ISO1452

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1.     Pin Functions: Full-Duplex Device
    2.     Pin Functions: Half-Duplex Device
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics: Driver
    10. 6.10 Electrical Characteristics: Receiver
    11. 6.11 Supply Current Characteristics: Side 1 (ICC1)
    12. 6.12 Supply Current Characteristics: Side 2 (ICC2)
    13. 6.13 Switching Characteristics: Driver
    14. 6.14 Switching Characteristics: Receiver
    15. 6.15 Insulation Characteristics Curves
    16. 6.16 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 8.3.2 Failsafe Receiver
      3. 8.3.3 Thermal Shutdown
      4. 8.3.4 Glitch-Free Power Up and Power Down
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Data Rate and Bus Length
        2. 9.2.2.2 Stub Length
        3. 9.2.2.3 Bus Loading
      3. 9.2.3 Application Curves
        1. 9.2.3.1 Insulation Lifetime
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 PCB Material
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
        1. 10.1.1.1 Related Links
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Functions: Full-Duplex Device

ISO1410 ISO1412 ISO1430 ISO1432 ISO1450 ISO1452 DW Package16-Pin SOICFull-Duplex Device Top View Figure 5-1 DW Package16-Pin SOICFull-Duplex Device Top View
PINType(1)DESCRIPTION
NAMENO.
A14IReceiver non-inverting input on the bus side
B13IReceiver inverting input on the bus side
D6IDriver input
DE5IDriver enable. This pin enables the driver output when high and disables the driver output when low or open.
GND1(2)2—Ground connection for VCC1
GND1(2)8—Ground connection for VCC1
GND2(2)9—Ground connection for VCC2
GND2(2)15—Ground connection for VCC2
NC(3)7—No internal connection
NC(3)10—No internal connection
R3OReceiver output
RE4IReceiver enable. This pin disables the receiver output when high or open and enables the receiver output when low.
VCC11—Logic-side power supply
VCC216—Transceiver-side power supply
Y11ODriver non-inverting output
Z12ODriver inverting output
(1) I = Input, O = Output
(2) For Logic side, both Pin 2 and Pin 8 must be connected to GND1. For Bus side, both Pin 9 and Pin 15 must be connected to GND2.
(3) Device functionality is not affected if NC pins are connected to supply or ground on PCB