SNVS031N April   2000  – June 2025 LM2676

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics: LM2676 – 3.3 V
    6. 5.6  Electrical Characteristics: LM2676 – 5 V
    7. 5.7  Electrical Characteristics: LM2676 – 12 V
    8. 5.8  Electrical Characteristics: LM2676 – Adjustable
    9. 5.9  Electrical Characteristics – All Output Voltage Versions
    10. 5.10 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Switch Output
      2. 6.3.2 Input
      3. 6.3.3 C Boost
      4. 6.3.4 Ground
      5. 6.3.5 Feedback
      6. 6.3.6 ON/OFF
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Active Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Design Considerations
      2. 7.1.2 Inductor
      3. 7.1.3 Output Capacitor
      4. 7.1.4 Input Capacitor
      5. 7.1.5 Catch Diode
      6. 7.1.6 Boost Capacitor
      7. 7.1.7 Additional Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Application for All Output Voltage Versions
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Custom Design with WEBENCH® Tools
          2. 7.2.1.2.2 Capacitor Selection Guides
          3. 7.2.1.2.3 Inductor Selection Guides
      2. 7.2.2 Application Curves
      3. 7.2.3 Fixed Output Voltage Application
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
          1. 7.2.3.2.1 Capacitor Selection
      4. 7.2.4 Adjustable Output Voltage Application
        1. 7.2.4.1 Design Requirements
        2. 7.2.4.2 Detailed Design Procedure
          1. 7.2.4.2.1 Capacitor Selection
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design with WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 DAP (VSON Package)

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Thermal Information

THERMAL METRIC(1)LM2676UNIT
NDZ (TO-220)KTW (TO-263)NHM (VSON)
7 PINS7 PINS14 PINS
RθJAJunction-to-ambient thermal resistanceSee (2)65——°C/W
See (3)45——
See (4)—56—
See (5)—35—
See (6)—26—
See (7)——55
See (8)——29
RθJC(top)Junction-to-case (top) thermal resistance22—°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.
(2) Junction to ambient thermal resistance (no external heat sink) for the 7-lead TO-220 package mounted vertically, with 0.5 in leads in a socket, or on a PCB with minimum copper area.
(3) Junction to ambient thermal resistance (no external heat sink) for the 7-lead TO-220 package mounted vertically, with 0.5 in leads soldered to a PCB containing approximately 4 square inches of (1 oz) copper area surrounding the leads.
(4) Junction to ambient thermal resistance for the 7-lead DDPAK mounted horizontally against a PCB area of 0.136 square inches (the same size as the DDPAK package) of 1 oz (0.0014 in thick) copper.
(5) Junction to ambient thermal resistance for the 7-lead DDPAK mounted horizontally against a PCB area of 0.4896 square inches (3.6 times the area of the DDPAK package) of 1 oz (0.0014 in thick) copper.
(6) Junction to ambient thermal resistance for the 7-lead DDPAK mounted horizontally against a PCB copper area of 1.0064 square inches (7.4 times the area of the DDPAK 3 package) of 1 oz (0.0014 in thick) copper. Additional copper area reduces thermal resistance further.
(7) Junction to ambient thermal resistance for the 14-lead VSON mounted on a PCB copper area equal to the die attach paddle.
(8) Junction to ambient thermal resistance for the 14-lead VSON mounted on a PCB copper area using 12 vias to a second layer of copper equal to die attach paddle. Additional copper area reduces thermal resistance further. For layout recommendations, see the AN-1187 Leadless Leadfram Package (LLP) application note.