7.3.1 Theory of Operation

The LM2734Z is a constant frequency PWM buck regulator IC that delivers a 1-A load current. The regulator has a preset switching frequency of 3 MHz. This high frequency allows the LM2734Z to operate with small surface mount capacitors and inductors, resulting in a DC–DC converter that requires a minimum amount of board space. The LM2734Z is internally compensated, so it is simple to use, and requires few external components. The LM2734Z uses current-mode control to regulate the output voltage.

The following operating description of the LM2734Z refers to the Functional Block Diagram and to the waveforms in Figure 7. The LM2734Z supplies a regulated output voltage by switching the internal NMOS control switch at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal oscillator. When this pulse goes low, the output control logic turns on the internal NMOS control switch. During this ON-time, the SW pin voltage (V_SW) swings up to approximately V_IN, and the inductor current (I_L) increases with a linear slope. I_L is measured by the current-sense amplifier, which generates an output proportional to the switch current. The sense signal is summed with the corrective ramp of the regulator and compared to the output of the error amplifier, which is proportional to the difference between the feedback voltage and V_REF. When the PWM comparator output goes high, the output switch turns off until the next switching cycle begins. During the switch OFF-time, inductor current discharges through Schottky diode D1, which forces the SW pin to swing below ground by the forward voltage (V_D) of the catch diode. The regulator loop adjusts the duty cycle (D) to maintain a constant output voltage.

Figure 7. LM2734Z Waveforms of SW Pin Voltage and Inductor Current

7.3.2 Boost Function

Capacitor C_BOOST and diode D2 in Figure 8 are used to generate a voltage V_BOOST. V_BOOST - V_SW is the gate drive voltage to the internal NMOS control switch. To properly drive the internal NMOS switch during its ON-time, V_BOOST needs to be at least 1.6 V greater than V_SW. Although the LM2734Z operates with this minimum voltage, it may not have sufficient gate drive to supply large values of output current. Therefore, TI recommends that V_BOOST be greater than 2.5 V above V_SW for best efficiency. V_BOOST – V_SW must not exceed the maximum operating limit of 5.5 V.

5.5 V > V_BOOST – V_SW > 2.5 V for best performance.

Figure 8. V_OUT Charges C_BOOST

When the LM2734Z starts up, internal circuitry from the BOOST pin supplies a maximum of 20 mA to C_BOOST. This current charges C_BOOST to a voltage sufficient to turn the switch on. The BOOST pin continues to source current to C_BOOST until the voltage at the feedback pin is greater than 0.76 V.

There are various methods to derive V_BOOST:

1. From the input voltage (V_IN)
2. From the output voltage (V_OUT)
3. From an external distributed voltage rail (V_EXT)
4. From a shunt or series zener diode

In Functional Block Diagram, capacitor C_BOOST and diode D2 supply the gate-drive current for the NMOS switch. Capacitor C_BOOST is charged through diode D2 by V_IN. During a normal switching cycle, when the internal NMOS control switch is off (T_OFF) (refer to Figure 7), V_BOOST equals V_IN minus the forward voltage of D2 (V_FD2), during which the current in the inductor (L) forward biases the Schottky diode D1 (V_FD1). Therefore the voltage stored across C_BOOST is calculated using Equation 1.

When the NMOS switch turns on (T_ON), the switch pin rises to:

forcing V_BOOST to rise thus reverse biasing D2. The voltage at V_BOOST is then:

which is approximately:

for many applications. Thus the gate-drive voltage of the NMOS switch is approximately:

An alternate method for charging C_BOOST is to connect D2 to the output as shown in Figure 8. The output voltage must be between 2.5 V and 5.5 V, so that proper gate voltage is applied to the internal switch. In this circuit, C_BOOST provides a gate drive voltage that is slightly less than V_OUT.

In applications where both V_IN and V_OUT are greater than 5.5 V, or less than 3 V, C_BOOST cannot be charged directly from these voltages. If V_IN and V_OUT are greater than 5.5 V, C_BOOST can be charged from V_IN or V_OUT minus a Zener voltage by placing a Zener diode D3 in series with D2, as shown in Figure 9. When using a series Zener diode from the input, ensure that the regulation of the input supply does not create a voltage that falls outside the recommended V_BOOST voltage.

Figure 9. Zener Reduces Boost Voltage from V_IN

An alternative method is to place the Zener diode D3 in a shunt configuration as shown in Figure 10. A small 350-mW to 500-mW, 5.1-V Zener in a SOT or SOD package can be used for this purpose. A small ceramic capacitor such as a 6.3-V, 0.1-µF capacitor (C4) must be placed in parallel with the Zener diode. When the internal NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The 0.1-µF parallel shunt capacitor ensures that the V_BOOST voltage is maintained during this time.

Resistor R3 must be chosen to provide enough RMS current to the Zener diode (D3) and to the BOOST pin. A recommended choice for the Zener current (I_ZENER) is 1 mA. The current I_BOOST into the BOOST pin supplies the gate current of the NMOS control switch and varies typically according to Equation 8.

For the worst case I_BOOST, increase the current by 25%. In that case, the worse-case boost current is:

R3 is then given by Equation 10.

For example, let V_IN = 10 V, V_ZENER = 5 V, V_D2 = 0.7 V, I_ZENER = 1 mA, and duty cycle D = 50%. Then:

Figure 10. Boost Voltage Supplied from the Shunt Zener on V_IN

7.3.3 Soft-Start

This function forces V_OUT to increase at a controlled rate during start-up. During soft-start, the reference voltage of the error amplifier ramps from 0 V to its nominal value of 0.8 V in approximately 200 µs. This forces the regulator output to ramp up in a more linear and controlled fashion, which helps reduce inrush current.

7.3.4 Output Overvoltage Protection

The overvoltage comparator compares the FB pin voltage to a voltage that is 10% higher than the internal reference Vref. Once the FB pin voltage goes 10% above the internal reference, the internal NMOS control switch is turned off, which allows the output voltage to decrease toward regulation.

7.3.5 Undervoltage Lockout

Undervoltage lockout (UVLO) prevents the LM2734Z from operating until the input voltage exceeds 2.74 V (typical).

The UVLO threshold has approximately 440 mV of hysteresis, so the part operates until V_IN drops below 2.3 V (typical). Hysteresis prevents the part from turning off during power up if V_IN is non-monotonic.

7.3.6 Current Limit

The LM2734Z uses cycle-by-cycle current limiting to protect the output switch. During each switching cycle, a current limit comparator detects if the output switch current exceeds 1.7 A (typical), and turns off the switch until the next switching cycle begins.

7.4.1 Enable Pin and Shutdown Mode

The LM2734Z has a shutdown mode that is controlled by the enable pin (EN). When a logic low voltage is applied to EN, the part is in shutdown mode and its quiescent current drops to typically 30 nA. Switch leakage adds another 40 nA from the input supply. The voltage at this pin must never exceed V_IN + 0.3 V.

7.4.2 Thermal Shutdown

Thermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature exceeds 165°C. After thermal shutdown occurs, the output switch doesn’t turn on until the junction temperature drops to approximately 150°C.