SNVS346F November   2007  – November 2014 LM3481 , LM3481-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings: LM3481
    3. 6.3 Handling Ratings: LM3481-Q1
    4. 6.4 Recommended Operating Ratings
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Overvoltage Protection
      2. 7.3.2 Bias Voltage
      3. 7.3.3 Slope Compensation Ramp
      4. 7.3.4 Frequency Adjust, Synchronization, and Shutdown
      5. 7.3.5 Undervoltage Lockout (UVLO) Pin
      6. 7.3.6 Short-Circuit Protection
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Boost Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design with WEBENCH Tools
          2. 8.2.1.2.2  Power Inductor Selection
          3. 8.2.1.2.3  Programming the Output Voltage and Output Current
          4. 8.2.1.2.4  Current Limit With Additional Slope Compensation
          5. 8.2.1.2.5  Power Diode Selection
          6. 8.2.1.2.6  Power MOSFET Selection
          7. 8.2.1.2.7  Input Capacitor Selection
          8. 8.2.1.2.8  Output Capacitor Selection
          9. 8.2.1.2.9  Driver Supply Capacitor Selection
          10. 8.2.1.2.10 Compensation
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Typical SEPIC Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Power MOSFET Selection
          2. 8.2.2.2.2 Power Diode Selection
          3. 8.2.2.2.3 Selection of Inductors L1 and L2
          4. 8.2.2.2.4 Sense Resistor Selection
          5. 8.2.2.2.5 SEPIC Capacitor Selection
          6. 8.2.2.2.6 Input Capacitor Selection
          7. 8.2.2.2.7 Output Capacitor Selection
        3. 8.2.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Custom Design with WEBENCH Tools
      2. 11.1.2 Receiving Notification of Documentation Updates
      3. 11.1.3 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VIN Pin Voltage –0.4 50 V
FB Pin Voltage –0.4 6 V
FA/SYNC/SD Pin Voltage –0.4 6 V
COMP Pin Voltage –0.4 6 V
UVLO Pin Voltage –0.4 6 V
VCC Pin Voltage –0.4 6.5 V
DR Pin Voltage –0.4 6 V
ISEN Pin Voltage –400 600 mV
Peak Driver Output Current 1 A
Power Dissipation Internally Limited
Junction Temperature 150 °C
Lead Temperature (only applies to operating conditions)
DGS Package  220 °C
Peak Body Temperature (2) 260 °C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Ratings indicates conditions for which the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions.
(2) Part is MSL1-260C qualified

6.2 Handling Ratings: LM3481

MIN MAX UNIT
Tstg Storage temperature range –65 150 °C
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) –2000 +2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) –750 +750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Handling Ratings: LM3481-Q1

MIN MAX UNIT
Tstg Storage temperature range –65 150 °C
V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) –2000 +2000 V
Charged device model (CDM), per AEC Q100-011 Corner pins (1, 5, 6, and 10) –750 +750
Other pins –750 +750
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.4 Recommended Operating Ratings

MIN MAX UNIT
Supply Voltage 2.97 48 V
Junction Temperature Range –40 125 °C
Switching Frequency Range 100 1 kHz/MHz

6.5 Thermal Information

THERMAL METRIC(1) LM3481 UNIT
VSSOP
10 PINS
RθJA Junction-to-ambient thermal resistance 157.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 51.1
RθJB Junction-to-board thermal resistance 76.9
ψJT Junction-to-top characterization parameter 5.0
ψJB Junction-to-board characterization parameter 75.6
RθJC(bot) Junction-to-case (bottom) thermal resistance -
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.6 Electrical Characteristics

VIN= 12 V, RFA= 40 kΩ, TJ = 25°C, unless otherwise indicated.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VFB Feedback Voltage VCOMP = 1.4 V, 2.97 ≤ VIN ≤ 48 V 1.275 V
VCOMP = 1.4 V, 2.97 ≤ VIN ≤ 48 V, –40°C ≤ TJ ≤ 125°C 1.256 1.294
ΔVLINE Feedback Voltage Line Regulation 2.97 ≤ VIN ≤ 48 V 0.003 %/V
ΔVLOAD Output Voltage Load Regulation IEAO Source/Sink ±0.5 %/A
VUVLOSEN Undervoltage Lockout Reference Voltage VUVLO Ramping Down 1.430 V
VUVLO Ramping Down, –40°C ≤ TJ ≤ 125°C 1.345 1.517
IUVLO UVLO Source Current Enabled 5 µA
Enabled, –40°C ≤ TJ ≤ 125°C 3 6
VUVLOSD UVLO Shutdown Voltage 0.55 0.7 0.82 V
ICOMP COMP pin Current Sink VFB = 0V 640 µA
VCOMP VFB = 1.275V 1 V
fnom Nominal Switching Frequency RFA = 40 kΩ 475 kHz
RFA = 40 kΩ, –40°C ≤ TJ ≤ 125°C 406 550
Vsync-HI Threshold for Synchronization on FA/SYNC/SD pin Synchronization Voltage Rising 1.4 V
Vsync-LOW Threshold for Synchronization on FA/SYNC/SD pin Synchronization Voltage Falling 0.7 V
RDS1 (ON) Driver Switch On Resistance (top) IDR = 0.2A, VIN= 5 V 4 Ω
RDS2 (ON) Driver Switch On Resistance (bottom) IDR = 0.2A 2 Ω
VDR (max) Maximum Drive Voltage Swing(2) VIN < 6V VIN V
VIN ≥ 6V 6
Dmax Maximum Duty Cycle RFA=40 kΩ 81% 85%
tmin (on) Minimum On Time 250 363 ns
worst case over temperature 571 ns
ISUPPLY Supply Current (switching) See(4) 3.7 mA
See(4), –40°C ≤ TJ ≤ 125°C 5.0
IQ Quiescent Current in Shutdown Mode VFA/SYNC/SD = 3 V(5), VIN = 12 V 9 µA
VFA/SYNC/SD = 3 V(5), VIN = 12 V, –40°C ≤ TJ ≤ 125°C 15
VFA/SYNC/SD = 3 V(5), VIN = 5 V 5
VFA/SYNC/SD = 3 V(5), VIN = 5 V, –40°C ≤ TJ ≤ 125°C 10
VSENSE Current Sense Threshold Voltage 160 mV
–40°C ≤ TJ ≤ 125°C 100 190
VSC Over Load Current Limit Sense Voltage 220 mV
–40°C ≤ TJ ≤ 125°C 157 275
VSL Internal Compensation Ramp Voltage 90 mV
VOVP Output Over-voltage Protection (with respect to feedback voltage)(3) VCOMP = 1.4 V 85 mV
VCOMP = 1.4 V, –40°C ≤ TJ ≤ 125°C 26 135
VOVP(HYS) Output Over-Voltage Protection Hysteresis VCOMP = 1.4 V 70 mV
VCOMP = 1.4 V, –40°C ≤ TJ ≤ 125°C 28 106
Gm Error Amplifier Transconductance VCOMP = 1.4 V 450 µmho
VCOMP = 1.4 V, –40°C ≤ TJ ≤ 125°C 216 690
AVOL Error Amplifier Voltage Gain VCOMP = 1.4 V, IEAO = 100 µA (Source/Sink) 60 V/V
VCOMP = 1.4 V, IEAO = 100 µA (Source/Sink), –40°C ≤ TJ ≤ 125°C 35 66
IEAO Error Amplifier Output Current (Source/ Sink) Source, VCOMP = 1.4 V, VFB = 1.1 V 640 µA
Source, VCOMP = 1.4 V, VFB = 1.1 V, –40°C ≤ TJ ≤ 125°C 475 837
Sink, VCOMP = 1.4 V, VFB = 1.4 V 65 µA
Sink, VCOMP = 1.4 V, VFB = 1.4 V, –40°C ≤ TJ ≤ 125°C 31 100
VEAO Error Amplifier Output Voltage Swing Upper Limit: VFB = 0 V, COMP Pin Floating 2.70 V
Upper Limit: VFB = 0 V, COMP Pin Floating, –40°C ≤ TJ ≤ 125°C 2.45 2.93
Lower Limit: VFB = 1.4 V 0.60 V
Lower Limit: VFB = 1.4 V, –40°C ≤ TJ ≤ 125°C 0.32 0.90
tSS Internal Soft-Start Delay VFB = 1.2 V, COMP Pin Floating 8.7 15 21.3 ms
tr Drive Pin Rise Time Cgs = 3000 pf, VDR = 0 V to 3 V 25 ns
tf Drive Pin Fall Time Cgs = 3000 pf, VDR = 3 V to 0 V 25 ns
VSD Shutdown signal threshold(1)FA/SYNC/SD pin Output = High (Shutdown) 1.31 V
Output = High (Shutdown), –40°C ≤ TJ ≤ 125°C 1.40
Output = Low (Enable) 0.68 V
Output = Low (Enable), –40°C ≤ TJ ≤ 125°C 0.40
ISD Shutdown Pin Current FA/SYNC/SD pin VSD = 5 V −1 µA
VSD = 0 V 20
TSD Thermal Shutdown 165 °C
Tsh Thermal Shutdown Hysteresis 10 °C
(1) The FA/SYNC/SD pin should be pulled to VIN through a resistor to turn the regulator off. The voltage on the FA/SYNC/SD pin must be above the max limit for the Output = High longer than 30 µs to keep the regulator off and must be below the minimum limit for Output = Low to keep the regulator on.
(2) The drive pin voltage, VDR, is equal to the input voltage when input voltage is less than 6 V. VDR is equal to 6 V when the input voltage is greater than or equal to 6 V.
(3) The overvoltage protection is specified with respect to the feedback voltage. This is because the overvoltage protection tracks the feedback voltage. The overvoltage threshold can be calculated by adding the feedback voltage (VFB) to the overvoltage protection specification.
(4) For this test, the FA/SYNC/SD Pin is pulled to ground using a 40-kΩ resistor.
(5) For this test, the FA/SYNC/SD Pin is pulled to 3 V using a 40-kΩ resistor.

6.7 Typical Characteristics

Unless otherwise specified, VIN = 12 V, TJ = 25°C.
LM3481 LM3481-Q1 20136546.png Figure 3. Comp Pin Voltage vs. Load Current
LM3481 LM3481-Q1 20136548.png Figure 5. Efficiency vs. Load Current (3.3 VIN and 12 VOUT)
LM3481 LM3481-Q1 20136550.png Figure 7. Efficiency vs. Load Current (9 VIN and 12 VOUT)
LM3481 LM3481-Q1 20136552.png Figure 9. COMP Pin Source Current vs. Temperature
LM3481 LM3481-Q1 20136554.png Figure 11. ISupply vs. Input Voltage (Switching)
LM3481 LM3481-Q1 20136557.png Figure 13. Drive Voltage vs. Input Voltage
LM3481 LM3481-Q1 20136559.png Figure 15. Current Sense Threshold vs. Input Voltage
LM3481 LM3481-Q1 201365a8.png Figure 17. Minimum On-Time vs. Temperature
LM3481 LM3481-Q1 20136547.png Figure 4. Switching Frequency vs. RFA
LM3481 LM3481-Q1 20136549.png Figure 6. Efficiency vs. Load Current (5 VIN and 12 VOUT)
LM3481 LM3481-Q1 201365a7.png Figure 8. Frequency vs. Temperature
LM3481 LM3481-Q1 20136553.png Figure 10. ISupplyvs. Input Voltage (Nonswitching)
LM3481 LM3481-Q1 20136556.png Figure 12. Shutdown Threshold Hysteresis vs. Temperature
LM3481 LM3481-Q1 20136558.png Figure 14. Short Circuit Protection vs. VIN
LM3481 LM3481-Q1 20136560.png Figure 16. Compensation Ramp Amplitude vs. Input Voltage