SNVSCV4 September 2024 LM3645
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The device address for the LM3645 is 1100101 (0x65). After the START condition, the I2C-compatible master sends the 7-bit address followed by an eighth read or write bit (R/W). R/W = 0 indicates a WRITE and R/W = 1 indicates a READ. The second byte following the device address selects the register address to which the data is written. The third byte contains the data for the selected register.
Figure 6-14 I2C-Compatible Chip Address