SNVS376F October   2005  – May 2016 LM5010A , LM5010A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LM5010A
    3. 6.3 ESD Ratings: LM5010A-Q1, LM5010-Q0
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Circuit Overview
      2. 7.3.2 Start-Up Regulator (VCC)
      3. 7.3.3 Regulation Comparator
      4. 7.3.4 Overvoltage Comparator
      5. 7.3.5 ON-Time Control
      6. 7.3.6 Soft Start
      7. 7.3.7 N-Channel Buck Switch and Driver
      8. 7.3.8 Current Limit
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Component Selection
          1. 8.2.2.1.1  R1 and R2
          2. 8.2.2.1.2  RON, FS
          3. 8.2.2.1.3  L1
          4. 8.2.2.1.4  RCL
          5. 8.2.2.1.5  C1
          6. 8.2.2.1.6  C2 and R3
          7. 8.2.2.1.7  C3
          8. 8.2.2.1.8  C4
          9. 8.2.2.1.9  C5
          10. 8.2.2.1.10 C6
          11. 8.2.2.1.11 D1
        2. 8.2.2.2 Low Output Ripple Configurations
        3. 8.2.2.3 Increasing The Current Limit Threshold
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VIN 6 75 V
VIN to RTN –0.3 76 V
BST to RTN –0.3 90 V
SW to RTN (steady state) –1.5 V
BST to VCC 76 V
BST to SW 14 V
VCC to RTN –0.3 14 V
SGND to RTN –0.3 0.3 V
SS to RTN –0.3 4 V
VIN to SW 76 V
All other inputs to RTN –0.3 7 V
Lead temperature (soldering, 4 sec)(2) 260 °C
Junction temperature (LM5010A, Q1,Q0) –40 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) For detailed information on soldering plastic HTSSOP and WSON packages, see Mechanical, Packaging, and Orderable Information.

6.2 ESD Ratings: LM5010A

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 ESD Ratings: LM5010A-Q1, LM5010-Q0

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1)(2) ±2000 V
Charged-device model (CDM), per AEC Q100-011(3) ±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
(2) Level listed above is the passing level per ANSI/ESDA/JEDEC JS-001. JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
(3) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

6.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Input voltage 6 75 V
IO Output current 1 A
Ext-VCC External bias voltage(1) 8 13 V
TJ Operating junction temperature LM5010A –40 125 °C
LM5010A-Q1, LM5010-Q0 –40 150 °C
(1) VCC provides bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.

6.5 Thermal Information

THERMAL METRIC(1) LM5010A, LM5010A-Q1 UNIT
DPR (WSON) PWP (HTSSOP)
10 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 36 41.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 31.9 26.5 °C/W
RθJB Junction-to-board thermal resistance 13.2 22.5 °C/W
ψJT Junction-to-top characterization parameter 0.3 0.7 °C/W
ψJB Junction-to-board characterization parameter 13.5 22.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 3 3.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.6 Electrical Characteristics

Typical values correspond to TJ = 25°C, minimum and maximum limits apply over TJ = –40°C to 125°C, VIN = 48 V, and
RON = 200 kΩ (unless otherwise noted).(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCC REGULATOR
VCCReg VCC regulated output 6.6 7 7.4 V
VIN - VCC ICC = 0 mA, FS < 200 kHz,
6 V ≤ VIN ≤ 8.5 V		 100 mV
VCC Bypass threshold VIN increasing 8.9 V
VCC Bypass hysteresis VIN decreasing 260 mV
VCC Output impedance
(0 mA ≤ ICC ≤ 5 mA)		 VIN = 6 V 55 Ω
VIN = 8 V 50
VIN = 48 V 0.21
VCC Current limit VIN = 48 V, VCC = 0 V 15 mA
UVLOVCC VCC undervoltage lockout threshold VCC increasing 5.25 V
UVLOVCC hysteresis VCC decreasing 180 mV
UVLOVCC filter delay 100 mV overdrive 3 µs
IIN Operating current Non-switching, FB = 3 V 675 950 µA
IIN Shutdown current RON/SD = 0 V 100 200 µA
SOFT-START PIN
ISS Internal current source 8 11.5 15 µA
CURRENT LIMIT
ILIM Threshold Current out of ISEN 1 1.25 1.5 A
Resistance from ISEN to SGND 130 mΩ
Response time 150 ns
ON TIMER, RON/SD PIN
Shutdown threshold Voltage at RON/SD rising 0.3 0.7 1.05 V
Threshold hysteresis 40 mV
REGULATION AND OVER-VOLTAGE COMPARATORS (FB PIN)
VREF FB regulation threshold TJ ≤ 125°C 2.445 2.5 2.55 V
TJ ≤ 150°C,
over full operating junction temperature range		 2.435
2.44
FB overvoltage threshold 2.9 V
FB bias current 1 nA
THERMAL SHUTDOWN
TSD Thermal shutdown temperature 175 °C
Thermal shutdown hysteresis 20 °C
(1) All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

6.7 Switching Characteristics

Typical values correspond to TJ = 25°C, minimum and maximum limits apply over TJ = –40°C to 125°C, and VIN = 48 V (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RDS(ON) Buck switch ISW = 200 mA TJ ≤ 125°C 0.35 0.8 Ω
TJ ≤ 150°C,
over full operating junction temperature range		 0.85
UVLOGD Gate drive UVLO VBST - VSW increasing 1.7 3 4 V
UVLOGD Hysteresis 400 mV
OFF TIMER
tOFF Minimum OFF-time 260 ns
ON TIMER
tON - 1 ON-time VIN = 10 V, RON = 200 kΩ 2.1 2.75 3.4 µs
tON - 2 ON-time VIN = 75 V, RON = 200 kΩ 290 390 496 ns
(1) All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations while applying statistical process control.
LM5010A LM5010A-Q1 20153811.gif Figure 1. Start-Up Sequence

6.8 Typical Characteristics

at TA = 25°C (unless otherwise noted)
LM5010A LM5010A-Q1 20153804.gif Figure 2. VCC vs VIN
LM5010A LM5010A-Q1 20153806.gif Figure 4. ICC vs Externally Applied VCC
LM5010A LM5010A-Q1 20153808.gif Figure 6. Voltage at RON/SD Pin
LM5010A LM5010A-Q1 20153805.gif Figure 3. VCC vs ICC
LM5010A LM5010A-Q1 20153807.gif Figure 5. ON-Time vs VIN and RON
LM5010A LM5010A-Q1 20153810.gif Figure 7. IIN vs VIN