SNVS359E May   2005  – December 2014 LM5021

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operation Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Performance Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Comparator and Slope Compensation
      2. 7.3.2 Current Limit and Current Sense
      3. 7.3.3 Oscillator, Shutdown and Sync Capability
      4. 7.3.4 Gate Driver and Max Duty Cycle Limit
      5. 7.3.5 Soft-Start
      6. 7.3.6 Hiccup Mode Overload Current Limiting
      7. 7.3.7 Skip Cycle Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN Below 20 V
      2. 7.4.2 Operation in Soft Start
      3. 7.4.3 Operation Under Normal Conditions
      4. 7.4.4 Operation in Skip Cycle
      5. 7.4.5 Operation at Overload
      6. 7.4.6 Operation in Hiccup Mode
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Startup Circuit
      2. 8.1.2 Relationship Between Input Capacitor CIN and VCC Capacitor CVCC
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Primary Bulk Capacitance
        2. 8.2.2.2 Transformer
        3. 8.2.2.3 Main Switch FET and Output Rectifier
        4. 8.2.2.4 Timing Resistor
        5. 8.2.2.5 Soft-Start Time
        6. 8.2.2.6 Current Sensing Network
          1. 8.2.2.6.1 Gate Drive Resistor
          2. 8.2.2.6.2 VCC Capacitor
          3. 8.2.2.6.3 Startup Circuit
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

8-Pin VSSOPand PDIP
Packages DGK and P
(Top View)
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Pin Functions

PIN I/O DESCRIPTION APPLICATION INFORMATION
NO. NAME
1 COMP I Control input for the Pulse Width Modulator and Hiccup comparators. COMP pull-up is provided by an internal 5K resistor which may be used to bias an opto-coupler transistor.
2 VIN I Input voltage. Input to start-up regulator. The VIN pin is clamped at 36 V by an internal zener diode.
3 VCC O Output only of a linear bias supply regulator. Nominally 8.5 V. VCC provides bias to controller and gate drive sections of the LM5021. An external capacitor must be connected from this pin to ground.
4 OUT O MOSFET gate driver output. High current output to the external MOSFET gate input with source/sink current capability of 0.3 A and 0.7 A respectively.
5 GND Ground return.
6 CS I Current Sense input. Current sense input for current mode control and over-current protection. Current limiting is accomplished using a dedicated current sense comparator. If the CS comparator input exceeds 0.5 V the OUT pin switches low for cycle-by-cycle current limit. CS is held low for 90ns after OUT switches high to blank the leading edge current spike.
7 RT / SYNC O Oscillator timing resistor pin and synchronization input. An external resistor connected from RT to GND sets the oscillator frequency. This pin will also accept synchronization pulses from an external clock.
8 SS O Soft-start / Hiccup time An external capacitor and an internal 22 µA current source set the soft-start ramp. The soft -start capacitor controls both the soft-start rate and the hiccup mode period.