SNVS790F January   2012  – November 2015 LM5114

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Dissipation
          1. 9.2.1.1.1 Gate Drive
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

DBV Package
6-Pin SOT-23
Top View
LM5114 PIN_SOT.gif
NGG Package
6-Pin WSON
Top View
LM5114 PIN_WQFN.gif

Pin Functions

PIN I/O DESCRIPTION
NAME SOT-23 WSON
IN 6 6 I Noninverting logic input
Connect to VDD when not used.
INB 5 5 I Inverting logic input
Connect to VSS when not used.
N_OUT 3 3 O Sink-current output
Connect to the gate of the MOSFET with a short, low inductance path. A gate resistor can be used to adjust the turnoff speed.
P_OUT 2 2 O Source-current output
Connect to the gate of the MOSFET with a short, low inductance path. A gate resistor can be used to adjust the turnon speed.
VDD 1 1 — Gate drive supply
Locally decouple to VSS using low ESR/ESL capacitor located as close as possible to the IC.
VSS 4 4 — Ground
All signals are referenced to this ground.
EP — ✓ — It is recommended that the exposed pad on the bottom of the package is soldered to ground plane on the PC board to aid thermal dissipation.