In a buck regulator the primary switching loop consists of the input capacitor, NMOS power switches and current sense resistor. Minimizing the area of this loop reduces the stray inductance and minimizes noise and possible erratic operation. High quality input capacitors should be placed as close as possible to the NMOS power switches, with the VIN side of the capacitor connected directly to the high-side NMOS drain and the ground side of the capacitor connected as close as possible to the current sense resistor ground connection.
Connect all of the low power ground connections (RUV1, RT, RFB1, CSS, CRES, CCM, CVIN, CRAMP) directly to the regulator AGND pin. Connect CVCC directly to the regulator PGND pin. Note that CVIN and CVCC must be as physically close as possible to the IC. AGND and PGND must be directly connected together through a top-side copper pattern connected to the exposed pad. Ensure no high current flows beneath the underside exposed pad.
The LM5117 has an exposed thermal pad to aid power dissipation. Adding several vias under the exposed pad helps conduct heat away from the IC. The junction to ambient thermal resistance varies with application. The most significant variables are the area of copper in the PC board, the number of vias under the exposed pad and the amount of forced air cooling. The integrity of the solder connection from the IC exposed pad to the PC board is critical. Excessive voids greatly decrease the thermal dissipation capacity.
The highest power dissipating components are the two power switches. Selecting NMOS switches with exposed pads aids the power dissipation of these devices.