SNVSBV2 September   2020 LM51561H , LM5156H

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Line Undervoltage Lockout (UVLO/SYNC/EN Pin)
      2. 9.3.2  High Voltage VCC Regulator (BIAS, VCC Pin)
      3. 9.3.3  Soft Start (SS Pin)
      4. 9.3.4  Switching Frequency (RT Pin)
      5. 9.3.5  Dual Random Spread Spectrum (DRSS)
      6. 9.3.6  Clock Synchronization (UVLO/SYNC/EN Pin)
      7. 9.3.7  Current Sense and Slope Compensation (CS Pin)
      8. 9.3.8  Current Limit and Minimum On-time (CS Pin)
      9. 9.3.9  Feedback and Error Amplifier (FB, COMP Pin)
      10. 9.3.10 Power-Good Indicator (PGOOD Pin)
      11. 9.3.11 Hiccup Mode Overload Protection (LM51561H Only)
      12. 9.3.12 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
      13. 9.3.13 MOSFET Driver (GATE Pin)
      14. 9.3.14 Overvoltage Protection (OVP)
      15. 9.3.15 Thermal Shutdown (TSD)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Standby Mode
      3. 9.4.3 Run Mode
  10. 10Application and Implementation
    1. 10.1 Power-On Hours (POH)
    2. 10.2 Application Information
    3. 10.3 Typical Application
      1. 10.3.1 Design Requirements
      2. 10.3.2 Detailed Design Procedure
        1. 10.3.2.1 Custom Design With WEBENCH® Tools
        2. 10.3.2.2 Recommended Components
        3. 10.3.2.3 Inductor Selection (LM)
        4. 10.3.2.4 Output Capacitor (COUT)
        5. 10.3.2.5 Input Capacitor
        6. 10.3.2.6 MOSFET Selection
        7. 10.3.2.7 Diode Selection
        8. 10.3.2.8 Efficiency Estimation
      3. 10.3.3 Application Curve
    4. 10.4 System Examples
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
        1. 13.1.2.1 Custom Design With WEBENCH® Tools
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Absolute Maximum Ratings

Over the recommended operating junction temperature range(1)
MIN MAX UNIT
Input BIAS to AGND –0.3 65 V
UVLO to AGND –0.3 VBIAS+0.3
SS to AGND(2) –0.3 3.8
RT to AGND(2) –0.3 3.8
FB to AGND –0.3 4.0
CS to AGND(DC) –0.3 0.3
CS to AGND(50ns transient) –1
PGND to AGND -0.3 0.3
DITHOFF to AGND -0.3 18
Output VCC to AGND –0.3 18(3) V
GATE to AGND (50ns transient) –1
PGOOD to AGND(4) –0.3 18
COMP to AGND(5) –0.3
Junction temperature, TJ (6) –40 150 °C
Storage temperature, Tstg –55 150
Stresses beyond those listed under  Absolute Maximum Ratings  may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions . Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
This pin is not specified to have an external voltage applied.
18 V or VBIAS + 0.3 V whichever is lower
The maximum current sink is limited to 1 mA when VPGOOD>VBIAS.
This pin has an internal max voltage clamp which can handle up to 1.6 mA.
High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.