July 2015 – June 2016
Pin Configuration and Functions
Absolute Maximum Ratings
Recommended Operating Conditions
Functional Block Diagram
Anode and Cathode Pins
VcapH and VcapL Pins
Gate Drive Pin
Gate Pull Down Pin
Device Functional Modes
Duty Cycle Calculation
Application and Implementation
Detailed Design Procedure
Selection of TVS Diodes in Automotive Reverse Polarity Applications
OR-ing Application Configuration
Power Supply Recommendations
Device and Documentation Support
Electrostatic Discharge Caution
Mechanical, Packaging, and Orderable Information
Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
10.1 Layout Guidelines
The VIN terminal is recommended to have a low-ESR ceramic bypass-capacitor. The typical recommended bypass capacitance is a 10-μF ceramic capacitor with a X5R or X7R dielectric.
The VIN terminal must be tied to the source of the MOSFET using a thick trace or polygon.
The Anode pin of the LM74610-Q1 is connected to the Source of the MOSFET for sensing.
The Cathode pin of the LM74610-Q1 is connected to the drain of the MOSFET for sensing.
The high current path of for this solution is through the MOSFET, therefor it is important to use thick traces for source and drain of the MOSFET.
The charge pump capacitor Vcap must be kept away from the MOSFET to lower the thermal effects on the capacitance value.
The Gate Drive and Gate pull down pins of the LM74610-Q1 must be connected to the MOSFET gate without using vias. Avoid excessively thin traces to the Gate Drive.
Obtaining acceptable performance with alternate layout schemes is possible, however this layout has been shown to produce good results and is intended as a guideline.
Keep the Drive pin close to the MOSFET to avoid further reduce MOSFET turn-on delay.
10.2 Layout Example
Figure 23. Layout Example