SNOS875H January   2000  – December 2024 LMC6035 , LMC6036

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: LMC6035
    5. 5.5 Thermal Information: LMC6036
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Capacitive Load Tolerance
    2. 7.2 Typical Applications
      1. 7.2.1 Differential Driver
      2. 7.2.2 Low-Pass Active Filter
        1. 7.2.2.1 Low-Pass Frequency Scaling Procedure
      3. 7.2.3 High-Pass Active Filter
        1. 7.2.3.1 High-Pass Frequency Scaling Procedure
      4. 7.2.4 Dual-Amplifier Bandpass Filter
        1. 7.2.4.1 DABP Component Selection Procedure
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
        1. 7.3.1.1 Printed Circuit Board (PCB) Layout for High-Impedance Work
        2. 7.3.1.2 DSBGA Considerations
      2. 7.3.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3.     Trademarks
    4. 8.3 Electrostatic Discharge Caution
    5. 8.4 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • PW|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

LMC6035 LMC6036 LMC6035 D Package, 8-Pin SOIC, and DGK Package, 8-Pin VSSOP (Top View) Figure 4-1 LMC6035 D Package, 8-Pin SOIC, and DGK Package, 8-Pin VSSOP (Top View)
Table 4-1 Pin Functions:LMC6035 D and DGK Packages
PIN TYPE DESCRIPTION
NAME NO.
–IN A 2 Input Inverting input channel A
–IN B 6 Input Inverting input channel B
+IN A 3 Input Noninverting input channel A
+IN B 5 Input Noninverting input channel B
OUT A 1 Output Output channel A
OUT B 7 Output Output channel B
V– 4 Power Negative supply
V+ 8 Power Positive supply
Figure 4-2 LMC6035 YZR Package, 8-Pin DSBGA and YAF Package, 8-Pin DSBGA (Top View)
Table 4-2 Pin Functions: LMC6035 YZR and YAF packages
PIN TYPE DESCRIPTION
NAME NO.
–IN A C2 Input Inverting input channel A
–IN B A2 Input Inverting input channel B
+IN A C3 Input Noninverting input channel A
+IN B A3 Input Noninverting input channel B
OUT A C1 Output Output channel A
OUT B A1 Output Output channel B
V– B3 Power Negative supply
V+ B1 Power Positive supply
LMC6035 LMC6036 LMC6036 D Package, 14-Pin SOIC, and PW Package, 14-Pin TSSOP (Top View) Figure 4-3 LMC6036 D Package, 14-Pin SOIC, and
PW Package, 14-Pin TSSOP (Top View)
Table 4-3 Pin Functions: LMC6036
PIN TYPE DESCRIPTION
NAME NO.
–IN A 2 Input Inverting input channel A
–IN B 6 Input Inverting input channel B
–IN C 9 Input Inverting input channel C
–IN D 13 Input Inverting input channel D
+IN A 3 Input Noninverting input channel A
+IN B 5 Input Noninverting input channel B
+IN C 10 Input Noninverting input channel C
+IN D 12 Input Noninverting input channel D
OUT A 1 Output Output channel A
OUT B 7 Output Output channel B
OUT C 8 Output Output channel C
OUT D 14 Output Output channel D
V– 11 Power Negative supply
V+ 4 Power Positive supply